TAS5036B datasheet(33/56 Pages) TI

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Serial Control Interface Register Definitions

SLES073—February 2003

TAS5036B

3.4

System Control Register 1 (x03)

Table 3–5. System Control Register 1

FUNCTION

RESERVED – Set to 0 in all cases

Valid remains high during automute.

Valid goes low during automute.

Valid remains high during mute.

Valid goes low during mute.

Mute

Normal mode

Set error recovery delay at 6

µs

Set error recovery delay at 47

µs

Error recovery (forces error recovery initialization sequence)

Normal mode

Automute disabled

Automute enabled

RESERVED – Set to 0 in all cases

3.5

Error Recovery Register (x04)

Table 3–6. Error Recovery Register

FUNCTION

–

Set to 11 under default conditions and when x00 is written into x1F

–

if x84 is written into x1F –

Enable volume ramp up after an error recovery sequence is initiated by the

ERR_RCVRY terminal or the I2C error recovery command (register X03 bit D2)

–

if x84 is written into x1F –

Disable volume ramp up after an error recovery sequence is initiated by the

ERR_RCVRY terminal or the I2C error recovery command (register X03 bit D2)

–

if x84 is written into x1F –

Enable volume ramp up after error recovery sequence is initiated by register bits

D5 – D0 of this register

–

if x84 is written into x1F –

Enable volume ramp up after error recovery sequence is initiated by register bits

D5 – D0 of this register

–

Put channel 6 into error recovery mode

–

Put channel 5 into error recovery mode

–

Put channel 4 into error recovery mode

–

Put channel 3 into error recovery mode

–

Put channel 2 into error recovery mode

–

Put channel 1 into error recovery mode

–

Normal operation

TAS5036B Datasheet(PDF) 33 Page - Texas Instruments

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