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RT3662EB Datasheet(PDF) 3 Page - Richtek Technology Corporation

Part # RT3662EB
Description  Single Channel PWM Controller with 2 Integrated Drivers for AMD SVI2 GPU CORE Power Supply
PDF  28 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT3662EB Datasheet(HTML) 3 Page - Richtek Technology Corporation

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RT3662EB
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3662EB-04
August
2019
www.richtek.com
3
Pin No.
Pin Name
Pin Function
14
VCC
Controller power supply. Connect this pin to 5V and place a decoupling
capacitor 2.2
F at least. The decoupling capacitor is as close controller as
possible.
15
PWROK
System power good input. If PWROK is low, the SVI interface is disabled
and VR returns to BOOT-VID state with initial load-line slope and initial
offset. If PWROK is high, the SVI interface is running and the DAC decodes
the received serial VID codes to determine the output voltage.
16
SVC
Serial VID clock input.
17
SVD
Serial VID data input. This pin is a serial data line.
18
SVT
Serial VID telemetry output from VR. This pin is a push-pull output.
19
VDDIO
Processor memory interface power rail and serves as the reference for
PWROK, SVD, SVC and SVT. This pin is used by the VR to reference the
SVI pins.
20
PGOOD
Power good indicator for the VDDC controller. This pin is an open drain
output.
21
VSEN
VDDC controller voltage sense input. This pin is connected to the terminal of
VDDC controller output voltage.
22
NC
No internal connection.
23
BOOT1
Bootstrap supply of phase1 for high side MOSFET. This pin powers high
side MOSFET driver.
24
UGATE1
Upper gate driver output of phase1. Connect this pin to the gate input of high
side MOSFET.
25
PHASE1
Switch nodes of high side driver for phase1. Connect this pin to high side
MOSFET Source together with the low side MOSFET Drain and the
inductor.
26
LGATE1
Lower gate driver output of phase1. Connect this pin to the gate input of low
side MOSFET.
27
PVCC
Driver power supply. Connect this pin to GND by the 2.2
F ceramic
capacitor at least. The decoupling capacitor is as close controller as
possible.
28
LGATE2
Lower gate driver output of phase2. Connect this pin to the gate input of low
side MOSFET.
29
PHASE2
Switch nodes of high side driver for phase2. Connect this pin to high side
MOSFET Source together with the low side MOSFET Drain and the
inductor.
30
UGATE2
Upper gate driver output of phase2. Connect this pin to the gate input of high
side MOSFET.
31
BOOT2
Bootstrap supply of phase2 for high side MOSFET. This pin powers high
side MOSFET driver.
32
EN
Controller enable input pin.
33 (Exposed Pad)
GND
Ground. The exposed pad must be soldered to a large PCB and connected
to GND for maximum power dissipation.



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