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CDC906 Datasheet(PDF) 32 Page - Texas Instruments

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Part # CDC906
Description  PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
PDF  39 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDC906 Datasheet(HTML) 32 Page - Texas Instruments

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CDC906
SCAS828 – SEPTEMBER 2006
controlled edge with respect to a t(
Θ) mean in a random sample of cycles. Phase jitter, Time Interval Error (TIE),
or Wander are used in literature to describe long-term variation in frequency. As of ITU-T: G.810, wander is
defined as phase variation at rates less than 10 Hz while jitter is defined as phase variation greater than 10 Hz.
The measurement interval must be long enough to gain a meaningful result. Wander can be caused by
temperature drift, aging, supply voltage drift, etc.
Figure 29. Snapshot of Phase Jitter
Jitter also depends on the VCO frequency (fVCO) of the PLL. A higher fVCO results in better jitter performance
compared to a lower fVCO. The VCO frequency can be defined via the M- and N-divider of the PLL.
As the CDC906 supports a pretty wide frequency range, the device offers a VCO Frequency Selection Bit, Bit
[7:5] of Byte 6. This bit defines the jitter-optimized frequency range of each PLL. The user can select between
the normal-speed mode (80 MHz to 200 MHz) and the high-speed mode (180 MHz to 300 MHz). Figure 30
shows the jitter performance over fVCO for the two frequency ranges.
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