PCA9421 datasheet(31/66 Pages) NXP

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NXP Semiconductors

PCA9421

Power management IC for low-power microcontroller applications

Bit

Symbol

Default value Type

Function

1: upon valid falling edge applied on “ON” pin, no mode

switch, the device stays in its current mode setting operation

SW2_OUT_0_OFFSET

R/W

SW2 output voltage offset selection in mode setting 0

0: SW2 Output Voltage = SW2_OUT_0_LSB [4:0] + 0 V

1: SW2 Output Voltage = SW2_OUT_0_LSB [4:0] + 1.2 V

SW2_OUT_0_LSB

[4:0]

01100

R/W

SW2 default output voltage for mode setting 0 (see below).

Note: The default value for SW2_OUT_A_LSB [4:0] is set

at 1.8 V, but it should be MTP programmable.

Table 28. MODECFG_0_1 register bit description...continued

00000=1.500 V

01001=1.725 V

10010=1.950 V

00001=1.525 V

01010=1.750 V

10011=1.975 V

00010=1.550 V

01011=1.775 V

10100=2.000 V

00011=1.575 V

01100=1.800 V

10101=2.025 V

00100=1.600 V

01101=1.825 V

10110=2.050 V

00101=1.625 V

01110=1.850 V

10111=2.075 V

00110=1.650 V

01111=1.875 V

11000=2.100 V

00111=1.675 V

10000=1.900 V

11001-11111=2.1 V

01000=1.700 V

10001=1.925 V

Table 29. SW2 default output voltage for mode setting 0

9.5.20 Mode configuration mode setting 0_2 (MODECFG_0_2, address 24h)

This register contains mode setting 0, part 2 configuration register. This is a READ AND WRITE register.

Bit

Symbol

Default value Type

Function

LDO1_ OUT_0

[3:0]

0100

R/W

LDO1 default output voltage for mode setting 0 (see below).

Note: The default value for LDO1_OUT_0 [3:0] is set at 1.8V, but it

should be MTP programmable.

SW1_EN_0

R/W

SW1 Enable Control in mode setting 0:

0: SW1 disabled

1: SW1 enabled

Note: reserve 1-bit MTP to set its default value

SW2_EN_0

R/W

SW2 Enable Control in mode setting 0:

0: SW2 disabled

1: SW2 enabled

Note: reserve 1-bit MTP to set its default value

Table 30. MODECFG_0_2 register bit description

PCA9421

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.0 — 16 October 2023

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