PCA9421 datasheet(65/66 Pages) NXP

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NXP Semiconductors

PCA9421

Power management IC for low-power microcontroller applications

Contents

General description ............................................ 1

Features and benefits .........................................1

Applications .........................................................1

Ordering information .......................................... 2

4.1

Ordering options ................................................ 2

Simplified block diagram ................................... 3

Pinning information ............................................ 4

6.1

Pinning ...............................................................4

6.2

Pin description ................................................... 5

System configuration diagram .......................... 7

Functional description ........................................9

8.1

Power control state diagram ..............................9

8.2

VIN ...................................................................10

8.3

VIN_AUX ..........................................................10

8.4

ASYS ............................................................... 10

8.5

VBAT_BKUP (back-up battery input) ............... 10

8.6

ON ....................................................................10

8.7

Mode setting .................................................... 11

8.8

Mode selection by external pins

(MODESEL0, MODESEL1) ............................. 12

8.9

SYSRSTn .........................................................12

8.10

Watchdog timer ................................................13

8.11

Regulators ........................................................13

8.11.1

Enable/disable and active discharge ............... 13

8.11.2

Power-good indication ..................................... 14

8.11.3

Power-up/down sequence and on-the-fly

voltage change ................................................ 14

8.11.4

BUCK1 (SW1, core buck regulator) .................15

8.11.5

BUCK2 (SW2, system buck regulator) .............16

8.11.6

LDO1 (always-on LDO) ................................... 16

8.11.7

LDO2 (system LDO) ........................................17

8.12

Hardware and software reset .......................... 17

8.13

Device level protection features .......................17

I2C-bus interface and register ......................... 17

9.1

I2C target address ...........................................17

9.2

General call and device ID addresses ............. 18

9.3

9.4

9.5

9.5.1

Device information (DEV_INFO, address

00h) ..................................................................20

9.5.2

Top level interrupt status (TOP_INT,

address 01h) ....................................................20

9.5.3

Sub level interrupt_0 (SUB_INT0, address

02h) ..................................................................21

9.5.4

Sub level interrupt_0 mask (Sub_INT0_

Mask, address 03h) .........................................21

9.5.5

Sub level interrupt_1 (Sub_INT1, address

04h) ..................................................................22

9.5.6

Sub level interrupt_1 mask (Sub_INT1_

Mask, address 05h) .........................................23

9.5.7

Sub level interrupt_2 (Sub_INT2, address

06h) ..................................................................23

9.5.8

Sub level interrupt_2 mask (Sub_INT2_

Mask, address 07h) .........................................24

9.5.9

Top level control_0 (TOP_CTL0, address

09h) ..................................................................24

9.5.10

Top level control_1 (TOP_CTL1, address

0Ah) ................................................................. 25

9.5.11

Top level control_2 (TOP_CTL2, address

0Bh) ................................................................. 26

9.5.12

Top level control_3 (TOP_CTL3, address

0Ch) ................................................................. 26

9.5.13

Top level control_4 (TOP_CTL4, address

0Dh) ................................................................. 27

9.5.14

VIN_PWR Status_0 (PWR_STATUS_0,

address 18h) ....................................................27

9.5.15

VIN_PWR Status_1 (PWR_STATUS_1,

address 19h) ....................................................28

9.5.16

Regulator status (REG_STATUS, address

20h) ..................................................................28

9.5.17

Active Discharge Regulator control (ACT_

DISCHARGE_CNTL, address 21h) ................. 29

9.5.18

Mode configuration mode setting 0_0

(MODECFG_0_0, address 22h) ...................... 29

9.5.19

Mode configuration mode setting 0_1

(MODECFG_0_1, address 23h) ...................... 30

9.5.20

Mode configuration mode setting 0_2

(MODECFG_0_2, address 24h) ...................... 31

9.5.21

Mode configuration mode setting 0_3

(MODECFG_0_3, address 25h) ...................... 32

9.5.22

Mode configuration mode setting 1_0

(MODECFG_1_0, address 26h) ...................... 33

9.5.23

Mode configuration mode setting 1_1

(MODECFG_1_1, address 27h) ...................... 34

9.5.24

Mode configuration mode setting 1_2

(MODECFG_1_2, address 28h) ...................... 34

9.5.25

Mode configuration mode setting 1_3

(MODECFG_1_3, address 29h) ...................... 35

9.5.26

Mode configuration mode setting 2_0

(MODECFG_2_0, address 2Ah) ......................36

9.5.27

Mode configuration mode setting 2_1

(MODECFG_2_1, address 2Bh) ......................37

9.5.28

Mode configuration mode setting 2_2

(MODECFG_2_2, address 2Ch) ......................38

9.5.29

Mode configuration mode setting 2_3

(MODECFG_2_3, address 2Dh) ......................38

9.5.30

Mode configuration mode setting 3_0

(MODECFG_3_0, address 2Eh) ......................39

9.5.31

Mode configuration mode setting 3_1

(MODECFG_3_1, address 2Fh) ...................... 40

9.5.32

Mode configuration mode setting 3_2

(MODECFG_3_2, address 30h) ...................... 41

9.5.33

Mode configuration mode setting 3_3

(MODECFG_3_3, address 31h) ...................... 41

9.5.34

RESET reason monitoring (RESET_

MONITOR, address 71h) .................................42

Limiting values ..................................................44

ESD ratings ........................................................44

Recommended operating conditions .............. 44

Electrical characteristics ..................................45

PCA9421

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.0 — 16 October 2023

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