PCA9421 datasheet(47/66 Pages) NXP

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NXP Semiconductors

PCA9421

Power management IC for low-power microcontroller applications

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

POWER UP/DOWN SEQUENCE TIMING[1]

TPWUP_DLY_INI

Power up Initial delay

Time from ON signal

asserts to the first

output rail reaches

90 % of its nominal

value

TPWDN_DLY_INTERVAL

Power down interval delay

Delay between

power rail

TPWUP_DLY_INTERVAL

Power up interval delay

For power up: this

is the time from

previous voltage

rail reaches 90 % of

its nominal value to

the time when the

following voltage

rail reaches its 90 %

nominal value

For power down:

this is the time

from the previous

voltage rail starts

falling to the time the

following rail starts

falling

Table 62. EC table for Top level...continued

[1]

Guaranteed by design and characterization; not tested in production.

PCA9421

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.0 — 16 October 2023

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