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XRT79L71 Datasheet(PDF) 72 Page - Exar Corporation

Part # XRT79L71
Description  1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE
PDF  109 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT79L71 Datasheet(HTML) 72 Page - Exar Corporation

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XRT79L71
69
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE
REV. 1.0.0
The Functional/Architectural Description of the XRT79L71, when configured to operate in the ATM UNI Mode,
can be found in Section _, within the document entitled: 79L71_Arch_Descr_ATM.pdf - Architectural/Functional
Description of the XRT79L71 1-Channel DS3/E3 ATM UNI/PPP/Clear-Channel Framer with LIU IC - ATM UNI
Mode Applications.
page 13
FUNCTIONAL ARCHITECTURE/DESCRIPTION OF THE XRT79L71 - PPP OVER DS3/E3 MODE
If the XRT79L71 has been configured to operate in the PPP over DS3/E3 Mode, then it will have the Functional
Architecture as is presented below in Figure 5.
Figure 5 indicates that the XRT79L71 consists of the following functional blocks.
• The Transmit POS-PHY Interface block
• The Transmit Overhead Data Input Interface block
• The Transmit PPP Packet Processor Block
• The Transmit FEAC Controller Block (DS3, C-bit Parity Applications Only)
• The Transmit Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications Only)
• The Transmit SSM Controller Block (E3, ITU-T G.832 Applications Only)
• The Transmit LAPD Controller Block
• The Transmit DS3/E3 Framer Block
• The Transmit DS3/E3 LIU Block
• he Receive DS3/E3 LIU Block
• The Receive DS3/E3 Framer Block
• The Receive LAPD Controller Block
• The Receive SSM Controller Block (E3, ITU-T G.832 Applications Only)
• The Receive Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications Only)
• The Receive FEAC Controller Block (DS3, C-bit Parity Applications Only)
• The Receive PPP Packet Processor Block
FIGURE 5. THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 WHEN IT HAS BEEN CONFIGURED TO OPERATE IN
THE
PPP OVER DS3/E3 MODE
Tx
POS-PHY
Interface
Block
Tx
POS-PHY
Interface
Block
Rx
POS-PHY
Interface
Block
Rx
POS-PHY
Interface
Block
Tx PPP
Packet
Processor
Block
Tx PPP
Packet
Processor
Block
Rx PPP
Packet
Processor
Block
Rx PPP
Packet
Processor
Block
Rx DS3/E3
Framer
Block
Rx DS3/E3
Framer
Block
Tx DS3/E3
Framer
Block
Tx DS3/E3
Framer
Block
Rx DS3/E3
LIU
Block
Rx DS3/E3
LIU
Block
Tx DS3/E3
LIU
Block
Tx DS3/E3
LIU
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
Only one JA exists.
Can be configured in
Tx or Rx Path



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