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AM3359 Datasheet(PDF) 102 Page - Texas Instruments

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Part # AM3359
Description  AM335x Sitara™ Processors
PDF  256 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM3359 Datasheet(HTML) 102 Page - Texas Instruments

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VDDS_RTC,
CAP_VDD_RTC
RTC_PWRONRSTn
PMIC_POWER_EN
All other 1.8-V Supplies
VDDSHV 1-6
VDDS_DDR
All 3.3-V Supplies
VDD_CORE, VDD_MPU
PWRONRSTn
CLK_M_OSC
1.8 V
1.1 V
1.8 V
1.8 V
1.8 V
1.8 V/1.5 V/1.35 V
3.3 V
1.1 V
102
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
SPRS717L – OCTOBER 2011 – REVISED MARCH 2020
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351
Power and Clocking
Copyright © 2011–2020, Texas Instruments Incorporated
A.
RTC_PWRONRSTn should be asserted for at least 1 ms to provide enough time for the internal RTC LDO output to
reach a valid level before RTC reset is released.
B.
The CAP_VDD_RTC terminal operates as an input to the RTC core voltage domain when the internal RTC LDO is
disabled by connecting the RTC_KALDO_ENn terminal to VDDS_RTC. If the internal RTC LDO is disabled,
CAP_VDD_RTC should be sourced from an external 1.1-V power supply.
C.
When using the ZCZ package option, VDD_MPU and VDD_CORE power inputs may be powered from the same
source if the application only uses operating performance points (OPPs) that define a common power supply voltage
for VDD_MPU and VDD_CORE. The ZCE package option has the VDD_MPU domain merged with the VDD_CORE
domain.
D.
If a USB port is not used, the respective VDDA1P8V_USB terminal may be connected to any 1.8-V power supply and
the respective VDDA3P3V_USB terminal may be connected to any 3.3-V power supply. If the system does not have a
3.3-V power supply, the VDDA3P3V_USB terminal may be connected to ground.
E.
If the system uses mDDR or DDR2 memory devices, VDDS_DDR can be ramped simultaneously with the other 1.8-V
I/O power supplies.
F.
VDDS_RTC should be ramped at the same time or before CAP_VDD_RTC, but these power inputs can be ramped
independent of other power supplies if PMIC_POWER_EN functionality is not required. If CAP_VDD_RTC is ramped
after VDD_CORE, there might be a small amount of additional leakage current on VDD_CORE. The power sequence
shown provides the lowest leakage option.
G.
To configure VDDSHVx [1-6] as 1.8 V, power up the respective VDDSHVx [1-6] to 1.8 V following the recommended
sequence. To configure VDDSHVx [1-6] as 3.3 V, power up the respective VDDSHVx [1-6] to 3.3 V following the
recommended sequence.
H.
If all the 1.8-V supplies are not sourced from the same power supply, it is required to power up VDDS before other
1.8-V supplies. Further, it is also recommended to source VDDS and VDDSHvx [x = 1-6] when configured as 1.8V
from the same power supply.
Figure 6-5. Power-Supply Sequencing With Internal RTC LDO Disabled



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