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H838024 Datasheet(PDF) 374 Page - Renesas Technology Corp |
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H838024 Datasheet(HTML) 374 Page - Renesas Technology Corp |
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374 / 697 page ![]() Section 10 Serial Communication Interface Rev. 7.00 Mar 10, 2005 page 332 of 652 REJ09B0042-0700 • Full-duplex communication Separate transmission and reception units are provided, enabling transmission and reception to be carried out simultaneously. The transmission and reception units are both double-buffered, allowing continuous transmission and reception. • On-chip baud rate generator, allowing any desired bit rate to be selected • Choice of an internal or external clock as the transmit/receive clock source • Six interrupt sources: transmit end, transmit data empty, receive data full, overrun error, framing error, and parity error Note: On the H8/38124 Group, the system clock generator must be used when carrying out this function. |
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