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H838024 Datasheet(PDF) 140 Page - Renesas Technology Corp

Part # H838024
Description  Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series
PDF  697 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838024 Datasheet(HTML) 140 Page - Renesas Technology Corp

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Section 3 Exception Handling
Rev. 7.00 Mar 10, 2005 page 98 of 652
REJ09B0042-0700
3.4
Application Notes
3.4.1
Notes on Stack Area Use
When word data is accessed in the LSI, the least significant bit of the address is regarded as 0.
Access to the stack always takes place in word size, so the stack pointer (SP: R7) should never
indicate an odd address. Use PUSH Rn (MOV.W Rn, @–SP) or POP Rn (MOV.W @SP+, Rn) to
save or restore register values.
Setting an odd address in SP may cause a program to crash. An example is shown in figure 3.6.
PC
PC
R1L
PC
SP
SP
SP
H'FEFC
H'FEFD
H'FEFF
→
→
→
H
L
L
MOV. B R1L, @
−R7
SP set to H'FEFF
Stack accessed beyond SP
BSR instruction
Contents of PC are lost
H
[Legend]
PCH:
PCL:
R1L:
SP:
Upper byte of program counter
Lower byte of program counter
General register R1L
Stack pointer
Figure 3.6 Operation when Odd Address is Set in SP
When CCR contents are saved to the stack during interrupt exception handling or restored when
RTE is executed, this also takes place in word size. Both the upper and lower bytes of word data
are saved to the stack; on return, the even address contents are restored to CCR while the odd
address contents are ignored.



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