UDA1321 datasheet(20/44 Pages) PHILIPS

20 / 44 page

1998 Oct 06

Philips Semiconductors

Preliminary speciﬁcation

Universal Serial Bus (USB)

Digital-to-Analog Converter (DAC)

UDA1321

Table 6

Control options for the UDA1321 via the EEPROM conﬁguration map; note 1

BYTE

(HEX)

NAME

COMMENTS

BIT

VALUE

−

recognition pattern; do not change it

AAH

−

recognition pattern; do not change it

55H

ASR control register

robust word clock

0 = off

1=on

serial I2S-bus output format

6 and 5

00 = I2S-bus

01 = 16-bit LSB

10 = 18-bit LSB

11 = 20-bit LSB

phase inversion

0 = mono phase inversion off

1 = mono phase inversion on

bits per sample modi

3 and 2

00 = reserved

01 = 8-bit audio

10 = 16-bit audio

11 = 24-bit audio

audio mode

0 = mono

1 = stereo

ASR register start-up mode

0 = stop

1=go

ADAC mode register 0

selection ADAC mode register

audio feature mode

6 and 5

00 = ﬂat

01 = minimum

10 = minimum

11 = maximum

de-emphasis

0 = de-emphasis off

1 = de-emphasis on

channel manipulation

0 = L

⇒ L, R ⇒ R

1=L

⇒ R, R ⇒ L

synchronous/asynchronous control

0 = asynchronous

1 = synchronous

mute control

0 = no mute

1 = mute active

reset ADAC

0 = no reset ADAC

1 = reset ADAC

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