UDA1321 datasheet(3/44 Pages) PHILIPS

3 / 44 page

1998 Oct 06

Philips Semiconductors

Preliminary speciﬁcation

Universal Serial Bus (USB)

Digital-to-Analog Converter (DAC)

UDA1321

The control information becomes accessible at the

microcontroller. The audio information becomes available

at the digital I/O output or is fed directly to the ADAC.

The microcontroller handles the high-level USB protocols,

translates the incoming control requests and manages the

user interface via General Purpose (GP) pins and an

I2C-bus.

The ADAC enables the wide and continuous range of input

sampling frequencies. By means of a Sample Frequency

Generator (SFG), the ADAC is able to reconstruct the

average sample frequency from the incoming audio

samples. The ADAC also performs the sound processing.

The ADAC consists of FIFO registers, a unique audio

feature processing DSP, the SFG, digital up-sampling

filters, a variable hold register, a Noise Shaper (NS) and a

Filter Stream DAC (FSDAC) with integrated filter and line

output drivers. The audio information is applied to the

ADAC via the USB processor or via the digital I/O input.

An external DSP can be used for adding extra sound

processing features via the digital I/O-bus.

The UDA1321 supports the standard I2S-bus data input

format and the LSB-justified serial data input format with

word lengths of 16, 18 and 20 bits.

The wide dynamic range of the bitstream conversion

technique used in the UDA1321 guarantees a high audio

sound quality.

QUICK REFERENCE DATA

Notes

1. VDD is the supply voltage on pins VDDA, VDDE, VDDI and VDDX. VSS is the ground on pins VSSA, VSSE, VSSI and VSSX.

All VDD and VSS pins must be connected to the same supply or ground respectively.

2. The audio information from the USB interface is fed directly to the ADAC.

3. The power-save mode (power management) is not supported in the UDA1321/N101;

see Chapter “USB-DAC UDA1321/N101 (Firmware sw 2.1.1.7)”.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

VDD

supply voltage

note 1

3.0

3.3

3.6

IDD(tot)

total supply current

−

IDD(ps)

supply current in power-save

mode

note 3

−

Dynamic performance DAC

total harmonic

distortion-plus-noise to signal

ratio

fs = 44.1 kHz; RL =5kΩ

at input signal of 1 kHz (0 dB)

−−90(2) −80

−

0.0032 0.01

at input signal of 1 kHz (

−60 dB) −−30(2) −20

−

3.2

S/Nbz

signal-to-noise ratio at bipolar

zero

A-weighted at code 0000H

−

dBA

Vo(FS)(rms)

full-scale output voltage

(RMS value)

VDD = 3.3 V

−

0.66

−

General characteristics

fi(sample)

audio sample input frequency

−

kHz

Tamb

operating ambient temperature

°C

THD

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