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PM5352 Datasheet(PDF) 38 Page - PMC-Sierra, Inc |
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PM5352 Datasheet(HTML) 38 Page - PMC-Sierra, Inc |
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38 / 77 page ![]() PM5352 S/UNI STAR DATA SHEET PMC-1990421 ISSUE 2 SATURN USER NETWORK INTERFACE 155 (STAR) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 34 Pin Name Type Pin No. Function PHY_OEN Input (ATM/ POS) A19 The PHY Output Enable (PHY_OEN) signal controls the operation of the system interface. When set to logic zero, all System Interface outputs are held tristate. When PHY_OEN is set to logic one, the interface is enabled. PHY_OEN can be overwritten by the PHY_EN Master System Interface Configuration register bit. PHY_OEN and PHY_EN are OR’ed together to enable the interface. When the S/UNI-STAR is the only PHY layer device on the bus, PHY_OEN can safely be tied to logic one. When the S/UNI-STAR shares the bus with other devices, then PHY_OEN must be tied to logic zero, and the PHY_EN register bit used to enable the bus once its PHY_ADR[2:0] is programmed in order to avoid conflicts. 6.4 Microprocessor Interface Signals Pin Name Type Pin No. Function CSB Input B11 The active-low chip select (CSB) signal is low during S/UNI-STAR register accesses. Note that when not being used, CSB must be tied high. If CSB is not required (i.e., registers accesses are controlled using the RDB and WRB signals only), CSB must be connected to an inverted version of the RSTB input. RDB Input D11 The active-low read enable (RDB) signal is low during S/UNI-STAR register read accesses. The S/UNI-STAR drives the D[7:0] bus with the contents of the addressed register while RDB and CSB are low. WRB Input A10 The active-low write strobe (WRB) signal is low during a S/UNI-STAR register write accesses. The D[7:0] bus contents are clocked into the addressed register on the rising WRB edge while CSB is low. |
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