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PM5352 Datasheet(PDF) 9 Page - PMC-Sierra, Inc |
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PM5352 Datasheet(HTML) 9 Page - PMC-Sierra, Inc |
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9 / 77 page  PM5352 S/UNI STAR DATA SHEET PMC-1990421 ISSUE 2 SATURN USER NETWORK INTERFACE 155 (STAR) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 5 • Provides HCS generation/insertion, and ATM cell payload scrambling. • Counts number of transmitted and idle cells. • Provides a synchronous 8-bit wide, four cell FIFO buffer. 1.7 The Transmit POS Processor • Generic design that supports any packet based link layer protocol, like PPP, HDLC and Frame Relay. • Performs self synchronous POS data scrambling (X43 + 1 polynomial). • Encapsulates packets within a POS frame. • Performs flag sequence insertion. • Performs byte stuffing for transparency processing. • Performs frame check sequence generation. The POS processor supports the generation of both CRC-CCITT and CRC-32 frame check sequences. • Aborts packets under the direction of the host or when the FIFO underflows. • Provides a synchronous 256 byte FIFO buffer accessed through the16-bit data bus on the POS-PHY System Interface. |
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