PM7344 datasheet(255/293 Pages) PMC

255 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

239

Figure 30

- XFDL Underrun Sequence

Flag

TDLINT[x]

D1 D2

TDLUDR[x]

Abort

UDR

D1 D2

D[7:0]

INTE

Serial Data

inserted into

ESF FDL

This diagram shows the relationship between XFDL inputs and outputs in the

case of an underrun error. An underrun error occurs if the XFDL finishes

transmitting the current message byte before the processor writes the next byte

into the Transmit Data Register; that is, the processor fails to write data to the

XFDL in time. In this example, data is not written to the XFDL within five rising

clock edges after TDLINT[x] goes high at the beginning of the transmission of

byte D3. The TDLUDR[x] interrupt becomes active at this point, and an abort,

followed by a flag, is sent out on the data link. Meanwhile, the processor must

clear the TDLUDR[x] interrupt by setting the UDR bit in the Status Register to

logic 0. The TDLINT[x] interrupt should also be disabled at this time by setting

the INTE bit in the Configuration/Control Register to logic 0. The data frame can

then be restarted as usual, by setting the INTE bit logic to 1. Transmission of the

frame then proceeds normally.

PM7344 Datasheet(PDF) 255 Page - PMC-Sierra, Inc