PM7344 datasheet(130/293 Pages) PMC

130 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

114

Registers 01EH, 11EH, 21EH and 31EH: T1-FRMR Interrupt Status

Bit

Type

Function

Default

Bit 7

COFAI

Bit 6

FERI

Bit 5

BEEI

Bit 4

SFEI

Bit 3

MFPI

Bit 2

INFRI

Bit 1

MFP

Bit 0

INFR

These registers indicate whether a change of frame alignment, a framing bit

error, a bit error event, or a severely errored framing event generated an

interrupt. These registers also indicate whether a mimic framing pattern was

detected or whether there was a change in the framing state of the frame

circuitry.

COFAI,FERI,BEEI,SFEI:

A logic 1 in the status bit positions COFAI, FERI, BEEI, and SFEI indicate that

the occurrence of the corresponding event generated an interrupt; a logic 0 in

the status bit positions COFAI, FERI, BEEI, and SFEI indicate that the

corresponding event did not generate an interrupt.

MFPI:

A logic 1 in the MFPI status bit position indicates that the assertion or

deassertion of the mimic detection indication has generated an interrupt; a

logic 0 in the MFPI bit position indicates that no change in the state of the

mimic detection indication occurred.

INFRI:

A logic 1 in the INFRI status bit position indicates that a change in the state of

the frame alignment circuitry generated an interrupt; a logic 0 in the INFRI

status bit position indicates that no state change occurred.

MFP,INFR:

The bit position MFP and INFR indicate the current state of the mimic

detection and of the frame alignment circuitry.

PM7344 Datasheet(PDF) 130 Page - PMC-Sierra, Inc

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