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TMP175 Datasheet(PDF) 18 Page - Texas Instruments |
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TMP175 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 33 page ![]() Measured Temperature T HIGH T LOW Device ALERT Pin (Compara tor Mode) POL =0 Device ALERT Pin (Interrupt Mode) POL =0 Device ALERT Pin (Compara tor Mode) POL =1 Device ALERT Pin (Interrupt Mode) POL =1 Read Read Time Read TMP175-Q1, TMP75-Q1 SBOS759 – NOVEMBER 2015 www.ti.com 7.5.3.1 Polarity (POL) The Polarity bit of the TMP175-Q1 lets the user adjust the polarity of the ALERT pin output. If the POL bit is set to 0 (default), the ALERT pin becomes active low. When the POL bit is set to 1, the ALERT pin becomes active high and the state of the ALERT pin is inverted. The operation of the ALERT pin in various modes is shown in Figure 12. Figure 12. Output Transfer Function Diagrams 7.5.3.2 Fault Queue (F1/F0) A fault condition is defined as when the measured temperature exceeds the user-defined limits set in the THIGH and TLOW registers. Additionally, the number of fault conditions required to generate an alert can be programmed using the fault queue. The fault queue is provided to prevent a false alert resulting from environmental noise. The fault queue requires consecutive fault measurements in order to trigger the Alert function. Table 9 defines the number of measured faults that can be programmed to trigger an Alert condition in the device. For the THIGH and TLOW register format and byte order, see the High- and Low-Limit Registers section. Table 9. Fault Settings of the TMP175-Q1 and TMP75-Q1 F1 F0 CONSECUTIVE FAULTS 0 0 1 0 1 2 1 0 4 1 1 6 18 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TMP175-Q1 TMP75-Q1 |
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