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PM7385 Datasheet(PDF) 60 Page - PMC-Sierra, Inc

Part # PM7385
Description  84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE
PDF  244 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7385 Datasheet(HTML) 60 Page - PMC-Sierra, Inc

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PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
51
and the 10 least significant bits of the poll address for identification of a channel.
The TAPI672 provides three poll results for every poll address according to Table
9. The TPAn[0] bit indicates whether or not space exists in the channel FIFO for
data and the TPAn[1] bit indicates whether or not that polled channel FIFO is at
risk of underflowing and should be provided data soon. The TPAn[2] bit indicates
that an underflow event has occurred on that channel FIFO.
Table 9 – Transmit Polling
Poll
Address
TPA1[0]
(Full/Space)
TPA1[1]
(Space/Starving)
TPA1[2]
(Underflow)
TPA2[0]
(Full/Space)
TPA2[1]
(Space/Starving)
TPA2[2]
(Underflow)
Channel 0 Channel 0
Channel 0
Channel 0 Channel 1
Channel 1
Channel 1
Channel 1 Channel 1
Channel 1
Channel 1 Channel 2
Channel 2
Channel 2
Channel 2 Channel 2
Channel 2
Channel 2 Channel 3
Channel 3
Channel 3
Channel 3 Channel 3
Channel 3
Channel 3 Channel 4
Channel 4
Channel 4
Channel 4 Channel 4
Channel 4
Channel 4 Channel 5
Channel 5
Channel 5
Channel 5 Channel 5
Channel 5
Channel 5 Channel 6
Channel 6
Channel 6
Channel 6 Channel 6
Channel 6
Channel 6 Channel 7
Channel 7
Channel 7
Channel 7 Channel 7
Channel 7
Channel 7 Channel 8
Channel 8
Channel 8
Channel 8 Channel 8
Channel 8
Channel 8 Channel 9
Channel 9
Channel 9
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
Channel
671
Channel
671
Channel
671
Channel
671
Channel 0
Channel 0
Channel 0
The TAPI672 maintains a mirror image of the status of each channel FIFO in the
partial packet buffer. The THDL672 continuously reports the status of the 672
channel FIFOs to the TAPI672 and the TAPI672 updates the mirror image
accordingly. The THDL672 also signals to the TAPI672 whenever an underflow
event has occurred on a channel FIFO. At the beginning of every data transfer
across the Tx APPI, the TAPI672 sets the mirror image status of the channel to
“full”. Only the TAPI672 can cause the status to be set to “full” and only the
THDL672 can cause the status to be set to “space” or “starving”. Only the
THDL672 can cause the status to be set to “underflow” and only the TAPI672 can
clear the “underflow” status when that channel FIFO is polled. In the event that
both the TAPI672 and the THDL672 try to change the mirror image status of a
particular channel simultaneously, the TAPI672 takes precedence, except for the
“underflow” status, where the THDL672 takes precedence.



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