PM7385 datasheet(79/244 Pages) PMC

79 / 244 page

PM7385 FREEDM-84A672

DATA SHEET

PMC-1990114

ISSUE 6

84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER

WITH ANY-PHY PACKET INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Bit

Type

Function

Default

Bit 15

TFUDRI

Bit 14

TFOVRI

Bit 13

TUNPVI

Bit 12

TPRTYI

Bit 11

Bit 6

Unused

XXH

Bit 5

RFOVRI

Bit 4

RPFEI

Bit 3

RABRTI

Bit 2

RFCSEI

Bit 1

Unused

Bit 0

Unused

This register reports the interrupt status for various events detected or initiated by

the FREEDM-84A672. Reading this registers acknowledges and clears the

interrupts.

RFCSEI:

The receive frame check sequence error interrupt status bit (RFCSEI) reports

receive FCS error interrupts to the microprocessor. RFCSEI is set high when

a mismatch between the received FCS code and the computed CRC residue

is detected. RFCSEI remains valid when interrupts are disabled and may be

polled to detect receive FCS error events.

RABRTI:

The receive abort interrupt status bit (RABRTI) reports receive HDLC abort

interrupts to the microprocessor. RABRTI is set high upon receipt of an abort

code (at least 7 contiguous 1’s). RABRTI remains valid when interrupts are

disabled and may be polled to detect receive abort events.

PM7385 Datasheet(PDF) 79 Page - PMC-Sierra, Inc

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