LX7220 datasheet(13/24 Pages) MICROCHIP

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DS20006704A-page 13

LX7220

5ctrl1

1-d

TBD

4DLY_DIS

45 ms delay on PGOOD is enabled.

0-d

Disable 45 ms delay on PGOOD.

Reserved

1-d

—

0—

Reserved

1-d

—

0—

Reserved

1-d

—

0—

0MODE

PWM mode only – NO PSM.

1-d

Power Saving Mode – allows discontinuous conduction.

Vendor ID, Address 03h (Read Only)

7:4

VID[3:0]

0010

Microchip Vendor ID.

3:2

A1A0

Designates the client address version. These bits will correspond to the two

LSB bits.

1:0

VOUT

The default output voltage is 0.95V.

Ctrl2, Address 04h, (aka reg4)

7:6

Reserved

—

5GO

Writing to this bit starts a VOUT transition regardless of its initial value.

0-d

The VOUT is ramped to the default VSEL Value.

Discharge

When the regulator is disabled, the output voltage is discharged through the

SW pin.

0-d

When the regulator is disabled, the output voltage is not discharged.

PGOK

(read only)

Is high when output is in regulation and VREF has stabilized.

Is low during an output voltage transition or when the output is not in

regulation.

2:1

SLEW

——

01-d

VREF slews at 0.8 mV/μs.

——

VREF slews at 2.2 mV/μs.

——

VREF slews at 8.4 mV/μs.

——

Reserved

—

Note:

-d is the default value at start-up.

CONTROL REGISTER BIT DEFINITION (CONTINUED)

Bit

Name

Value

Description

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