Serial Mode

In the synchronous serial interface mode, instructions and data are sent between the host and the module using 8-bit

bytes. Two bytes are required per read/write cycle and are transmitted MSB first. The start byte contains 5 high bits, the

Read/Write (R/W) control bit, the Register Select (RS) control bit, and a low bit. The subsequent byte contains the in-

struction/data bits. The R/W bit determines whether the cycle is a read (high) or a write (low) cycle. The RS bit is used to

identify the second byte as an instruction (low) or data (high).

This mode uses the strobe (ST) control signal, Serial Clock (SCK) input, and Serial I/O (SI/SO) line to transfer informa-

tion. In a write cycle, bits are clocked into the module on the rising edge of SCK. In a read cycle, bits in the start byte are

clocked into the module on the rising edge of SCK. After a minimum wait time, each bit in the instruction/data byte can

be read from the module after each falling edge of SCK. Each read/write cycle begins on the falling edge of ST and

ends on the rising edge. To be a valid read/write cycle, the ST must go high at the end of the cycle.

HT16514

Rev. 1.00

29

October 4, 2006

D a t a W r i t e

S C K

S I

S T

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2

1 3

1 4

1 5

1 6

1 7

S y n c h r o n o u s B i t s

S t a r t B y t e

I n s t r u c t i o n / D a t a

1 m s

D a t a R e a d

S C K

S I , S O

S T

S y n c h r o n o u s B i t s

S t a r t B y t e

R e a d D a t a

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

9

" 1 "

" 1 "

" 1 "

" 1 "

" 1 " R , W

R S

" 0 "

D 7

D 6

D 5

D 4

D 3

D 2

D 1

D 0

" 1 "

" 1 "

" 1 "

" 1 "

" 1 " R , W

R S

" 0 "

" 0 "

B F

I R 6

I R 5

I R 4

I R 3

I R 2

I R 1

I R 0