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TSC2006 Datasheet(PDF) 24 Page - Texas Instruments |
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TSC2006 Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 46 page ![]() www.ti.com REGISTER ACCESS (Control Byte 0 with R/W Bit) ReadRegisterViaControlByte0 SCLK SDI (MOSI) SDO (MISO) MSB MSB LSB Hi-Z Hi-Z L B S D7 0 A3 A2 A1 A0 1 0 D15 D14 D13 D9 D8 D4 D0 D6 D5 D4 D3 D2 D1 D0 6 5 4 3 2 1 1 3 8 7 2 16 15 8 7 CS ( ) SS D5 11 D1 WritetoRegisterViaControlByte0 SCLK SDI (MOSI) SDO (MISO) MSB LSB Hi-Z D7 0 A3 A2 A1 A0 0 D6 D5 D4 D3 D2 D1 D0 6 5 4 3 2 1 1 3 8 7 2 16 15 8 7 CS ( ) SS 11 MSB L B S D15 D14 D13 D9 D8 D4 D0 D5 D1 12 TSC2006 SBAS415A – JUNE 2007 – REVISED NOVEMBER 2007 Control byte 0, beginning with D7 = 0, is used to access the internal registers. This control byte uses the last bit, D0, to control the flow of data. If D0 is '1', then the content of the register pointed by the address bits (A3-A0) is output to SDO (MISO) in the next cycle. Otherwise, the data coming from SDI (MOSI) are written to the register properly pointed to by the address bits in the control byte (if the write mode is available for the pointed register). After Control Byte 0 with Read/Write Bit followed by a 16-bit word on SDO/SDI completes, the master can hold CS low to send another Control Byte 0 with Read/Write Bit followed by a 16-bit word on SDO/SDI as many times as the master is able to operate. Figure 32. Interface Timing — Sending Control Byte 0 with Read Bit Figure 33. Interface Timing — Sending Control Byte 0 with Write Bit 24 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TSC2006 |
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