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RESET

State

Nor a

m l

erai n

t o

Resetting

InitialCondition

<5 s

WL(RESET)

TSC2006

SBAS415A – JUNE 2007 – REVISED NOVEMBER 2007

There are three way to reset the TSC2006. First, at power-on, a power good signal generates a prolonged reset

pulse internally to all registers.

Second, an external pin, RESET, is available to perform a system reset or allow other peripherals (such as a

display) to reset the device if the pulse meets the timing requirement (at least 10

µs wide). Any RESET pulse less

than 5

µs is rejected. To accommodate the timing drift between devices because of process variation, a RESET

pulse width between 5

µs to 10µs falls into the gray area that is not recognized, and the result is undetermined;

this situation should be avoided. Refer to Figure 34 for details. A good reset pulse must be low for at least 10

µs.

There is an internal spike filter to reject spikes up to 20ns wide.

NOTE: See Timing Requirements for more information.

Figure 34. External Reset Timing

Finally, a software reset can be activated by writing a '1' to CB1.1 (bit 1 of control byte 1). It should be noted this

reset is not self-clearing, so the user must write a '0' to remove the software reset.

A reset clears all registers and loads default values. A power-on reset and external (hardware) reset take

precedence over a software reset. If a software reset is not cleared by the user, it is cleared by either a power-on

reset or an external (hardware) reset.

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