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TMP89FS60 Datasheet(PDF) 361 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 361 Page - Toshiba Semiconductor

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Page 347
TMP89FS60
RA002
22.8.6 Product ID code output command (operation command: 0xC0)
Table 22-12 shows the transfer formats of the product ID code output command.
Note 1: "0x**
× 3" means that the device goes into an idle state after transmitting 3 bytes of 0x**. For further information, refer to
Table 22-18.
Note 2: The ROM size code at the 14th byte is shown in Table 22-13.
Note 3: 16th through 21st bytes show the range of addresses in flash memory where data can be written.
Table 22-12 Transfer Formats of the Product ID Code Output Command
Transfer byte
Transfer data from the external controller to
TMP89FS60
Baud rate
Transfer data from TMP89FS60 to the external
controller
BOOT
ROM
1st byte
2nd byte
Matching data 1 (0x86 or 0x30)
-
Automatic adjustment
Baud rate after adjustment
-(Automatic baud rate adjustment)
OK: Echo back data (0x86 or 0x30)
Error: No data transmitted
3rd byte
4th byte
Matching data 2 (0x79 or 0xCF)
-
Baud rate after adjustment
Baud rate after adjustment
-
OK: Echo back data (0x79 or 0xCF)
Error: No data transmitted
5th byte
6th byte
Operation command data (0xC0)
-
Baud rate after adjustment
Baud rate after adjustment
-
OK: Echo back data (0xC0)
Error: 0xA1
× 3, 0xA3 × 3, 0x63 × 3 (note 1)
7th byte
Baud rate after adjustment
0x3A
Start mark
8th byte
Baud rate after adjustment
0x13
Number of transfer data (from 9th to
27th bytes)
9th byte
Baud rate after adjustment
0x03
Length of address (3 bytes)
10th byte
Baud rate after adjustment
0xFD
Reserved
11th byte
Baud rate after adjustment
0x00
Reserved
12th byte
Baud rate after adjustment
0x00
Reserved
13th byte
Baud rate after adjustment
0x00
Reserved
14th byte (note 2)
0xF0
ROM size code
15th byte
Baud rate after adjustment
0x01
ROM block count
(1 block)
16th byte (note 3)
Baud rate after adjustment
0x00
First address of ROM (upper byte)
17th byte (note 3)
Baud rate after adjustment
0x10
First address of ROM (middle byte)
18th byte (note 3)
Baud rate after adjustment
0x00
First address of ROM (lower byte)
19th byte (note 3)
Baud rate after adjustment
0x00
End address of ROM (upper byte)
20th byte (note 3)
Baud rate after adjustment
0xFF
End address of ROM (middle byte)
21st byte (note 3)
Baud rate after adjustment
0xFF
End address of ROM (lower byte)
22nd byte (note 4)
Baud rate after adjustment
0x00
First address of RAM (upper byte)
23rd byte (note 4)
Baud rate after adjustment
0x00
First address of RAM (middle byte)
24th byte (note 4)
Baud rate after adjustment
0x60
First address of RAM (lower byte)
25th byte (note 4)
Baud rate after adjustment
0x00
End address of RAM (upper byte)
26th byte (note 4)
Baud rate after adjustment
0x0C
End address of RAM (middle byte)
27th byte (note 4)
Baud rate after adjustment
0x3F
End address of RAM (lower byte)
28th byte
Baud rate after adjustment
0xYY
YYH : Checksum of transfer data
(complement of 2 of the sum total from
9th through 27th bytes)
29th byte
(Wait for the next operation command data)
Baud rate after adjustment
-



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