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TMP89FS60 Datasheet(PDF) 401 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 401 Page - Toshiba Semiconductor |
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401 / 410 page  Page 387 TMP89FS60 RA003 25.7 AC Characteristics 25.7.1 MCU mode (Flash programming or erasing) 25.7.2 MCU mode (Except Flash Programming or erasing) (VSS = 0 V, VDD = 4.5 V to 5.5 V, Topr = −10 to 40°C) Parameter Symbol Condition Min Typ. Max Unit Machine cycle time tcy NORMAL1, 2 modes 0.125 − 4 µs IDLE0, 1, 2 modes SLOW1, 2 modes 117.6 − 133.3 SLEEP0, 1 modes High-level clock pulse width tWCH For external clock operation (XIN input). fc = 8.0 MHz − 62.5 − ns Low-level clock pulse width tWCL High-level clock pulse width tWSH For external clock operation (XTIN input) fs = 32.768 kHz − 15.26 − µs Low-level clock pulse width tWSL (VSS = 0 V, VDD = 4.3 V to 5.5 V, Topr = −40 to 85°C) Parameter Symbol Condition Min Typ. Max Unit Machine cycle time tcy NORMAL1, 2 modes 0.125 − 4 µs IDLE0, 1, 2 modes SLOW1, 2 modes 117.6 − 133.3 SLEEP0, 1 modes High-level clock pulse width tWCH For external clock operation (XIN input). fc = 8.0 MHz − 62.5 − ns Low-level clock pulse width tWCL High-level clock pulse width tWSH For external clock operation (XTIN input) fs = 32.768 kHz − 15.26 − µs Low-level clock pulse width tWSL (VSS = 0 V, VDD = 3.0 V to 4.3 V, Topr = −40 to 85°C) Parameter Symbol Condition Min Typ. Max Unit Machine cycle time tcy NORMAL1, 2 modes 0.238 − 4 µs IDLE0, 1, 2 modes SLOW1, 2 modes 117.6 − 133.3 SLEEP0, 1 modes High-level clock pulse width tWCH For external clock operation (XIN input). fc = 8.0 MHz − 62.5 − ns Low-level clock pulse width tWCL High-level clock pulse width tWSH For external clock operation (XTIN input) fs = 32.768 kHz − 15.26 − µs Low-level clock pulse width tWSL |
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