TMP89FS60 datasheet(260/410 Pages) TOSHIBA

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Page 246

17. Synchronous Serial Interface (SIO)

17.5 Transfer Modes

TMP89FS60

RA001

(1)

When the internal clock is used and SIO0SR<TBFL> is "0"

When the data transmission is completed, the SCLK0 pin becomes the initial state and the SO0 pin

becomes the "H" level. SIO0SR<SEF> remains at "0". When the internal clock is used, the serial

clock and data output is stopped until the next transmit data is written into SIO0BUF (automatic

wait).

When the subsequent data is written into SIO0BUF, SIO0SR<SEF> is set to "1", the SCLK0 pin

outputs the serial clock, and the transmit operation is restarted. An INTSIO0 interrupt request is gen-

erated at the restart of the transmit operation.

(2)

When an external clock is used and SIO0SR<TBFL> is "0"

When the data transmission is completed, the SO pin keeps last output value. When an external

serial clock is input to the SCLK0 pin after completion of the data transmission, an undefined value

is transmitted and the transmit underrun error flag SIO0SR<UERR> is set to "1".

If a transmit underrun error occurs, data must not be written to SIO0BUF during the transmission

of an undefined value. (It is recommended to finish the transmit operation by setting

SIO0CR<SIOS> to "0" or force the transmit operation to stop by setting SIO0CR<SIOM> to "00".)

The transmit underrun error flag SIO0SR<UERR> is cleared by reading SIO0SR.

(3)

When an internal or external clock is used and SIO0SR<TBFL> is "1"

When the data transmission is completed, SIO0SR<TBFL> is cleared to "0". The data in

SIO0BUF is transferred to the shift register and the transmission of subsequent data is started. At this

time, SIO0SR<SEF> is set to "1" and an INTSIO0 interrupt request is generated.

17.5.1.5 Stopping the transmit operation

Set SIO0CR<SIOS> to "0" to stop the transmit operation. When SIO0SR<SEF> is "0", or when the

shift operation is not in progress, the transmit operation is stopped immediately and an INTSIO0 interrupt

request is generated. When SIO0SR<SEF> is "1", the transmit operation is stopped after all the data in the

shift register is transmitted (reserved stop). At this time, an INTSIO0 interrupt request is generated again.

When the transmit operation is completed, SIO0SR<SIOF, SEF and TBFL> are cleared to "0". Other

SIO0SR registers keep their values.

If the internal clock has been used, the SO0 pin automatically returns to the "H" level. If an external

clock has been used, the SO0 pin keeps the last output value. To return the SO0 pin to the "H" level, write

"00" to SIO0CR<SIOM> when the operation is stopped.

The transmit operation can be forced to stop by setting SIO0CR<SIOM> to "00" during the operation.

By setting SIO0CR<SIOM> to "00", SIO0CR<SIOS> and SIO0SR are cleared to "0" and the SIO stops

the operation, regardless of the SIO0SR<SEF> value. The SO0 pin becomes the "H" level. If the internal

clock is selected, the SCLK0 pin returns to the initial level.

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