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TMP88CS38 Datasheet(PDF) 136 Page - Toshiba Semiconductor

Part # TMP88CS38
Description  8-bit single chip microcomputer
PDF  226 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP88CS38 Datasheet(HTML) 136 Page - Toshiba Semiconductor

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TMP88CS38/CM38A/CP38A
2007-09-12
88CS38-136
Binary Counter Control Register
7
6
5
4
3
2
1
0
CGCR
(00030H)
“0”
“0”
DV1CK
“0”
“0”
“0”
“0”
“0”
(Initial value: 0000 0000)
DV1CK
Select of input clock to
1st divider
0:
fc/4
1:
fc/8
R/W
Note 1:
*: Don’t care
Note 2:
The all bits except DV1CK are cleared to “0”.
Figure 2.13.5 DIVIDER Control Register
(1) Internal counter
The internal counter of PWM outputs is a free running counter. The all bits of
counter are set to “1” and are not counted up at one of the following conditions.
1. During reset
2. The operation mode is changed to STOP mode.
3. Setting ABORTx (x: 1, 2) to “1”.
4. The START3 to 0 are “0” in 12-bit PWM outputs. The START9 to 4 are “0” in 7-bit
PWM outputs.
5. The lower 8-bit of PWM data latch in 12-bit PWM outputs is “00H”. The PWM
data latch in 7-bit PWM outputs is “00H”.
(2) Outputs control and programming of PWM data
The PWM outputs are fixed to a high-level immediately when the ABORTx (x: 1, 2) is
set to “1”. The PWM outputs starts the operation when the STARTx (x: 0 to 9) is set to
“1”.
The data from the transfer buffer to a PWM data latch is transferred when the all bits of
internal counter are set to “1”. Therefore, the data is transferred to a PWM data latch
immediately when the internal counter is initialized. And the data is transferred to a PWM
data latch at the beginning of the next cycle when all bits of the internal counter are not set
to “1”.
The sequence of writing the output data to PWM data latches is shown as follows;
1.
PWM0
to PWM1
a) Write the channel number of PWM data latch to PWMCHS1 (Bit2 and 1 in
PWMCR1B) and clear PWMHL (Bit0 in PWMCR1B) to “0”.
b) Write the lower 8-bit PWM output data to PWMDBR1.
c) Write the channel number of PWM data latch to PWMCHS1 and set PWMHL
to “1”.
d) Write the upper 4-bit or 6-bit PWM output data to PWMDBR1.
e) Select the resolution of PWM output to RESOLUTIONx (x: 0, 1) (Bit0 and 1 in
PWMCR1A) and set STARTx (x: 0, 1) (Bit2 and 3 in PWMCR1B) to “1”.
Note:
PWM output data must be write to PWMDBR1 in the order of the lower 8-bit
PWM output data, the upper 4-bit (or 6-bit) PWM output data. If the upper 4-bit
(or 6-bit) PWM output data is write to PWMDBR1, the lower 8-bit PWM output
data is not changed (except when lower 8-bit PWM output data is “00H”).



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