LM43602 datasheet(33/44 Pages) TI2

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VIN

PGND

CIN

VIN

COUT

VOUT

High di/dt

current

BUCK

CONVERTER

LM43602-Q1

www.ti.com

SNVSA83C – APRIL 2015 – REVISED OCTOBER 2017

Product Folder Links: LM43602-Q1

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9 Power Supply Recommendations

The LM43602-Q1 is designed to operate from an input voltage supply range between 3.5 V and 60 V. This input

supply must be well regulated and able to withstand maximum input current and maintain a stable voltage. The

resistance of the input supply rail should be low enough that an input current transient does not cause a high

enough drop at the LM43602-Q1 supply voltage that can cause a false UVLO fault triggering and system reset.

If the input supply is located more than a few inches from the LM43602-Q1 additional bulk capacitance may be

required in addition to the ceramic bypass capacitors. The amount of bulk capacitance is not critical, but a 47-µF

or 100-µF electrolytic capacitor is a typical choice.

10 Layout

The performance of any switching converter depends as much upon the layout of the PCB as the component

selection. The following guidelines will help users design a PCB with the best power conversion performance,

thermal performance, and minimized generation of unwanted EMI.

10.1 Layout Guidelines

1. Place ceramic high frequency bypass CIN as close as possible to the LM43602-Q1 VIN and PGND pins.

Grounding for both the input and output capacitors should consist of localized top side planes that connect to

the PGND pins and PAD.

2. Place bypass capacitors for VCC and BIAS close to the pins and ground the bypass capacitors to device

ground.

3. Minimize trace length to the FB pin net. Locate both feedback resistors, RFBT and RFBB close to the FB pin.

Place CFF directly in parallel with RFBT. If VOUT accuracy at the load is important, make sure VOUT sense is

made at the load. Route VOUT sense path away from noisy nodes and preferably through a layer on the other

side of a shieldig layer.

4. Use ground plane in one of the middle layers as noise shielding and heat dissipation path.

5. Have a single point ground connection to the plane. Route the ground connections for the feedback, soft-

start, and enable components to the ground plane. This prevents any switched or load currents from flowing

in the analog ground traces. If not properly handled, poor grounding can result in degraded load regulation or

erratic output voltage ripple behavior.

6. Make VIN, VOUT and ground bus connections as wide as possible. This reduces any voltage drops on the

input or output paths of the converter and maximizes efficiency.

7. Provide adequate device heat-sinking. Use an array of heat-sinking vias to connect the exposed pad to the

ground plane on the bottom PCB layer. If the PCB has multiple copper layers, these thermal vias can also be

connected to inner layer heat-spreading ground planes. Ensure enough copper area is used for heat-sinking

to keep the junction temperature below 125°C.

10.1.1 Compact Layout for EMI Reduction

Radiated EMI is generated by the high di/dt components in pulsing currents in switching converters. The larger

area covered by the path of a pulsing current, the more EMI is generated. The key to minimize radiated EMI is to

identify pulsing current path and minimize the area of the path. In buck converters,the pulsing current path is

from the VIN side of the input capacitors to HS switch, to the LS switch, and then return to the ground of the input

capacitors, as shown in Figure 63.

Figure 63. Buck Converter High Δi/Δt Path

LM43602 Datasheet(PDF) 33 Page - Texas Instruments

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