GL3522-22 Datasheet

© 2014 Genesys Logic, Inc. - All rights reserved.

Page 8

GLI Confidential

CHAPTER 2

FEATURES

 Compliant with USB Specification Revision 3.0

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Upstream port supports super speed(SS) high speed(HS) and full speed(FS) traffic

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Downstream ports support SS, HS, FS, and low speed(LS) traffic

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1 control pipe and 1 interrupt pipe

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Backward compatible to USB specification Revision 2.0/1.1

 Featuring fast-charging on all downstream ports and upstream port

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Compliant with USB Battery Charging Revision v1.2, supporting CDP, DCP, and ACA-Dock

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Downstream ports can be turned from a Standard Downstream Port (SDP) into Charging Downstream

Port (CDP) or Dedicated Charging Port (DCP)

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Downstream devices can be charged while upstream VBUS is not present, which can be applied on wall

charger applications

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Upstream port is capable of charging and data communicating simultaneously for portable devices

supporting ACA-Dock or proprietary charging protocols, such as Sony Z1 and ZL

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Supporting Apple 2.4A and Samsung Galaxy devices fast-charging

 On-chip 8-bit micro-processor

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RISC-like architecture

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USB optimized instruction set

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1 cycle instruction execution (maximum)

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Performance: 12 MIPS @ 12MHz (maximum)

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With 256-byte RAM, 20K-byte internal ROM, and 20K-byte SRAM

 Multiple Transaction Translator(TT) architecture

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Providing dedicated TT control logics for each downstream port

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Superior performance when multiple FS devices operate concurrently

 Integrated USB transceiver

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Improving output drivers with slew-rate control for EMI reduction

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Internal power-fail detection for ESD recovery

 Advanced power management and low power consumption

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Supporting USB3.0 U0/U1/U2/U3 power management states

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Supporting USB Link Power Management (LPM) L0/L1/L2

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Supporting individual/gang mode over-current detection for all downstream ports

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Supporting both low/high-enabled power switches

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Patented Smart Power Management

 Configurable settings by SPI-flash/EEPROM/pin strapping

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Configurable charging port

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Configurable 4/3/2 downstream ports

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Configurable Poly-fuse/Power-switch

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Supporting full in-system programming firmware upgrade by SPI-flash and EEPROM

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Supporting compound-device (non-removable setting on downstream ports)

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Supporting customization VID/PID

 Flexible design

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Automatic switching between self-powered and bus-powered modes

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Supporting PHY tuning

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Supporting register setting by firmware

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Supporting vendor command and SMBUS

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Allow downstream ports to connect up to 8 devices, 4 x USB3.0 non-removable devices with 4 x

USB2.0 non-removable devices or exposed ports