–

–

R = 500k

L

W

R = 50k

L

W

R = 5k

L

W

C = 10nF

L

C = 1nF

L

C = 100pF

L

V

O

C

L

R

L

2 R

p

L

C

L

INA138-Q1

f

–3dB

f

=

–3dB

V

IN+

V

IN–

OUT

GND

14

INA138-Q1, INA168-Q1

SGLS174J – SEPTEMBER 2003 – REVISED AUGUST 2018

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Product Folder Links: INA138-Q1 INA168-Q1

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Copyright © 2003–2018, Texas Instruments Incorporated

8.2.2 Output Filter

Filter the output of the INA1x8-Q1 devices.

Figure 12. Output Filter

8.2.2.1 Design Requirements

For this design example, use the input parameters shown in Table 3.

Table 3. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

Supply voltage, V+

INA138-Q1: 2.7 V to 36 V

INA168-Q1: 2.7 V to 60 V

Common-mode voltage, VCM

INA138-Q1: 2.7 V to 36 V

INA168-Q1: 2.7 V to 60 V

Full-scale shunt voltage, VSENSE

50 mV to 100 mV

Load resistor, RL

5 kΩ to 500 kΩ

8.2.2.2 Detailed Design Procedure

A low-pass filter can be formed at the output of the INA1x8-Q1 simply by placing a capacitor of the desired value

in parallel with the load resistor. First, determine the value of the load resistor needed to achieve the desired gain

by using Table 1. Next, determine the capacitor value that results in the desired cutoff frequency according to the

equation shown in Figure 12. Figure 13 shows various combinations of gain settings (determined by RL) and filter

capacitors.

8.2.2.3 Application Curve

Figure 13. Gain vs Frequency