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ADS1291IRSMT Datasheet(PDF) 39 Page - Texas Instruments

Part # ADS1291IRSMT
Description  ADS129x Low-Power, 2-Channel, 24-Bit Analog Front-End for Biopotential Measurements
PDF  83 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS1291IRSMT Datasheet(HTML) 39 Page - Texas Instruments

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GPIO1
GPIO2
t
BLKDLY
(Blocking Signal)
t
PHASE
(Modulation Clock)
39
ADS1291, ADS1292, ADS1292R
www.ti.com
SBAS502C – DECEMBER 2011 – REVISED APRIL 2020
Product Folder Links: ADS1291 ADS1292 ADS1292R
Submit Documentation Feedback
Copyright © 2011–2020, Texas Instruments Incorporated
(1)
Specifications apply from –40°C to +85°C.
8.3.10.4.2
Internal Respiration Circuitry With External Clock (ADS1292R)
This mode is set by RESP_CTRL = 1. In this mode GPIO1 and GPIO2 are automatically configured as inputs.
GPIO1 and GPIO2 cannot be used for other purposes. The signals must be provided as described in Figure 43.
An external, synchronous master clock (CLK) is required for this mode in order to operate.
Figure 43. Internal Respiration (RESP_CTRL = 1) Timing Diagram
Table 12. Timing Characteristics for Figure 43(1)
PARAMETER
1.65 V
≤ DVDD ≤ 3.6 V
UNIT
MIN
TYP
MAX
tPHASE
Respiration phase delay
0
168.75
Degrees
tBLKDLY
Modulation clock rising edge to XOR signal
0
5
ns
8.3.11 Setting the Device for Basic Data Capture
This section outlines the procedure to configure the device in a basic state and capture data. This procedure is
intended to put the device in a data sheet condition to check if the device is working properly in the user's
system. It is recommended that this procedure be followed initially to get familiar with the device settings. Once
this procedure has been verified, the device can be configured as needed. For details on the timings for
commands refer to the appropriate sections in the data sheet. Also, some sample programming codes are added
for the ECG-specific functions. Figure 44 details a flow chart of the configuration procedure.
8.3.11.1 Lead-Off
Sample code to set dc lead-off with current source or sink resistors on all channels
WREG LOFF 10h // Comparator threshold at 95% and 5%, current source or sink resistor // DC lead-off
WREG CONFIG2 E0h // Turn-on dc lead-off comparators
WREG LOFF_SENS 0Fh // Turn on both P- and N-side of all channels for lead-off sensing
Observe the status bits of the output data stream to monitor lead-off status.



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