ADS1291IRSMT datasheet(55/83 Pages) TI2

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ADS1291, ADS1292, ADS1292R

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SBAS502C – DECEMBER 2011 – REVISED APRIL 2020

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8.6.1.5 CH1SET: Channel 1 Settings (address = 04h)

This register configures the power mode, PGA gain, and multiplexer settings channels. See the Input Multiplexer

section for details.

Figure 60. CH1SET: Channel 1 Settings

PD1

GAIN1_2

GAIN1_1

GAIN1_0

MUX1_3

MUX1_2

MUX1_1

MUX1_0

(1)

When powering down channel 1, make sure the input multiplexer is set to input short configuration. Bits[3:0] = 001.

(2)

For channel 1, (MVDDP – MVDDN) is [0.5(AVDD + AVSS)]; for channel 2, (MVDDP – MVDDN) is DVDD / 4. Note that to avoid

saturating the PGA while measuring power supplies, the gain must be set to '1'.

Table 21. CH1SET: Channel 1 Settings Field Descriptions

Bit 7

PD1: Channel 1 power-down

0 = Normal operation (default)

1 = Channel 1 power-down(1)

Bits[6:4]

GAIN1[2:0]: Channel 1 PGA gain setting

These bits determine the PGA gain setting for channel 1.

000 = 6 (default)

001 = 1

010 = 2

011 = 3

100 = 4

101 = 8

110 = 12

Bits[3:0]

MUX1[3:0]: Channel 1 input selection

These bits determine the channel 1 input selection.

0000 = Normal electrode input (default)

0001 = Input shorted (for offset measurements)

0010 = RLD_MEASURE

0011 = MVDD(2) for supply measurement

0100 = Temperature sensor

0101 = Test signal

0110 = RLD_DRP (positive input is connected to RLDIN)

0111 = RLD_DRM (negative input is connected to RLDIN)

1000 = RLD_DRPM (both positive and negative inputs are connected to RLDIN)

1001 = Route IN3P and IN3N to channel 1 inputs

1010 = Reserved

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