BQ25882 datasheet(39/86 Pages) TI2

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BQ25883

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SLUSDL3A – FEBRUARY 2019 – REVISED APRIL 2019

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8.5.3 Input Voltage Limit Register (Address = 02h) [reset = 84h]

REG02 is shown in Figure 36 and described in Table 12.

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Figure 36. REG02 Register

Bit

Reset

04h

Field

EN_VINDPM_R

EN_BAT_DISC

PFM_OOA_DIS

VINDPM[4:0]

Table 12. REG02 Register Field Descriptions

Bit

Field

Type

Reset by

REG_RST

Reset by

WATCHDOG

Description

EN_VINDPM_RST

R/W

Yes

Enable VINDPM automatic reset upon adapter plugin:

0 – Disable VINDPM reset when adapter is plugged in

1 – Enable VINDPM reset when adapter is plugged in (VINDPM resets to default

value after Input Source Type Detection) (Default)

EN_BAT_DISCHG

R/W

Yes

Enable BAT pin discharge load (IBAT_DISCHG):

0 – Disable load (Default)

1 – Enable BAT discharge load

PFM_OOA_DIS

R/W

Yes

PFM Out-of-Audio (OOA) Mode Disable:

0 – Out-of-audio mode enabled while converter is in PFM (Default)

1 – Out-of-audio mode disabled while converter is in PFM

VINDPM[4]

R/W

Yes

1600 mV

Absolute Input Voltage Limit:

Offset: 3.9 V

Range: 3.9V – 5.5V

Default: 4.3 V

Note: VINDPM > 5.5V (10h) clamped to 5.5V. VINDPM register is

reset upon adapter plug-in if EN_VINDPM_RST = 1.

VINDPM[3]

R/W

Yes

800 mV

VINDPM[2]

R/W

Yes

400 mV

VINDPM[1]

R/W

Yes

200 mV

VINDPM[0]

R/W

Yes

100 mV

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