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BQ25882 Datasheet(PDF) 59 Page - Texas Instruments |
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BQ25882 Datasheet(HTML) 59 Page - Texas Instruments |
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59 / 86 page ![]() 59 BQ25883 www.ti.com SLUSDL3A – FEBRUARY 2019 – REVISED APRIL 2019 Product Folder Links: BQ25883 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 8.5.23 ADC Function Disable Register (Address = 16h) [reset = 00h] REG16 is shown in Figure 56 and described in Table 32. Return to Summary Table. Figure 56. REG16 Register Bit 7 6 5 4 3 2 1 0 Reset 0 0 0 0 0 0 1 0 Field IBUS_ADC_DIS ICHG_ADC_DI S VBUS_ADC_DI S VBAT_ADC_DI S VSYS_ADC_DI S TS_ADC_DIS Reserved TDIE_ADC_DIS Table 32. REG16 Register Field Descriptions Bit Field Type Reset by REG_RST Reset by WATCHDOG Description 7 IBUS_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion 6 ICHG_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion 5 VBUS_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion 4 VBAT_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion 3 VSYS_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion 2 TS_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion 1 RESERVED R Yes No Reserved bit always reads 1h 0 TDIE_ADC_DIS R/W Yes No 0 – Enable conversion 1 – Disable conversion |
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