L99DZ320 datasheet(120/146 Pages) STMICROELECTRONICS

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6.4.14

Control register 18 (0x3F)

Table 104. Control register 18

Bit

name

Reset

value

Access RW

Table 105. CR18 signals description

Bit

Name

Description

EI2_PU

External Interrupt 2: configuration of internal current source

0: pull-down (default)

1: pull-up

Note: the setting is valid only if input is configured as External Interrupt in CR1 (0x26).

22:21

RESERVED

EI1_PU

External Interrupt 1: configuration of internal current source

0: pull-down (default)

1: pull-up

EI2_EN

External Interrupt 2 enable

0: EI2 disabled

1: EI2 enabled (default)

Note: the setting is valid only if input is configured as External Interrupt in CR1 (0x26).

18:17

RESERVED

EI1_EN

External Interrupt 2 enable

0: EI1 disabled

1: EI1 enabled (default)

EI2_FILT_1

External Interrupt 2: configuration of input filter

Input Filter Configuration

00 External Interrupt 2 monitored in static mode (filter time twu_stat) (default)

01 External Interrupt 2 monitored in cyclic mode with Timer2 (filter time: tWU_cyc; blanking time 80% of

timer ON time)(1)

10 External Interrupt 2 monitored in cyclic mode with Timer1 (filter time: tWU_cyc; blanking time 80% of

timer ON time)(1)

11 Invalid setting; command is ignored and SPI INV CMD id set

Note: EI2_FILT_[1:0] setting is only valid if input is configured as External Interrupt in CR1 (0x26).

EI2_FILT_0

13:10

RESERVED

EI1_FILT_1

External Interrupt 1: configuration of input filter

Input Filter Configuration

00 External Interrupt 1 monitored in static mode (filter time twu_stat) (default)

01 External Interrupt 1 monitored in cyclic mode with Timer 2 (filter time: tWU_cyc; blanking time 80% of

timer ON time)(1)

EI1_FILT_0

L99DZ320

SPI Registers

DS14235 - Rev 5

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