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TPS3430 Datasheet(PDF) 4 Page - Texas Instruments

Part # TPS3430
Description  TPS3430 Window Watchdog Timer with Programmable Reset Delay
PDF  37 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TPS3430 Datasheet(HTML) 4 Page - Texas Instruments

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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply voltage range
VDD1, VDD2
–0.3
7
V
Output voltage range
WDO
–0.3
7
V
Voltage ranges
SET0, SET1, WDI,
–0.3
7
V
CWD, CRST
–0.3
VDD + 0.3(3)
Output pin current
WDO
±20
mA
Input current (all pins)
±20
mA
Continuous total power dissipation
See Section 6.4
Temperature
Operating junction, TJ (2)
–40
150
°C
Operating free-air temperature, TA (2)
–40
150
Storage, Tstg
–65
150
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2)
TJ = TA as a result of the low dissipated power in this device.
(3)
The absolute maximum rating is VDD + 0.3 V or 7.0 V, whichever is smaller.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC
JS-001(1)
±4000
V
Charged-device model (CDM), per JEDEC
specification JESD22-C101(2)
±1000
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VDD1, VDD2 Supply pin voltage
1.6
6.5
V
VSET0
SET0 pin voltage
0
6.5
V
VSET1
SET1 pin voltage
0
6.5
V
CCRST
WD reset delay capacitor
0.1(1)
1000(1)
nF
RCRST
Pull-up resistor to VDD
9
10
11
kΩ
CCWD
Watchdog timing capacitor
0.1(2)
1000(2)
nF
CWD
Pull-up resistor to VDD
9
10
11
kΩ
RPU
Pull-up resistor, WDO
1
10
100
kΩ
IWDO
Watchdog output current
10
mA
TJ
Junction Temperature
–40
125
°C
(1)
Using a CCRST capacitor of 0.1 nF or 1000 nF gives a reset delay of 703 µs or 3.22 seconds, respectively.
(2)
Using a CCWD capacitor of 0.1 nF or 1000 nF gives a tWDU(typ) of 62.74 ms or 77.45 seconds, respectively.
TPS3430
SBVS366A – JULY 2018 – REVISED OCTOBER 2021
www.ti.com
4
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TPS3430



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