Data Sheet

LT83401/LT83402

analog.com

Rev. 0

31 of 44

Output Voltages Above 15V

The LT83401/LT83402 can be configured for output voltages above 15V, even though the SET pin voltage is limited

to a maximum of 15V, by using a traditional resistor divider from VOUT to OUTS, as shown in Figure 53. It is

recommended to configure the SET pin voltage to be 15V, in which case the resistor values can be chosen according

to Equation 9.

R1 = R2������(������) = (������ + ������)������ = (

VOUT − 15V

15V + R2 × IOUTS

)

(9)

The OUTS pin current is 170nA ± 60nA per the Electrical Characteristics table. The divider values R1 and R2 can be

chosen such that this OUTS pin current variation introduces <0.1% error in output voltage regulation. The thermal

noise of the resistors in the resistor divider also adds to the output noise. It is recommended to choose the resistor

values such that their impedance as viewed from the SET pin (R1||R2) is less than 5kΩ to keep their noise contribution

low compared to the noise contribution of the part itself.

Figure 53. Configuring the LT83401/LT83402 for Output Voltages above 15V

At output voltages above 15V, the low-frequency noise has some dependence on the output voltage, the divider gains

up the noise. By configuring the SET voltage to be 15V, this dependency is minimized, for example, the noise gain

from a 15V reference to 18VOUT is 30 times lower than the gain from a conventional 0.5V voltage reference to 18VOUT.

High VOUT Considerations

In applications where the output voltage is higher than 20V, refer to the Reverse Current Considerations section in

Application Note AN-2582.

Output Voltages Below 0.5V

Due to the current reference architecture, the LT83401/LT83402 can be configured for output voltages below 0.5V

all the way down to 0V. It should be noted that for output voltages below 0.5V, the Power Good and Fast Start-Up

functionalities are not available, and these functionalities must be disabled correctly by tying PGFB to INTVCC or to

0.5V.

Output Sensing and Stability

The LT83401/LT83402’s OUTS pin provides a Kelvin sense connection to the output. The SET pin resistor’s GND side

provides a Kelvin sense connection to the load’s GND side.

The LT83401/LT83402’s internal error amplifier has a relatively high voltage gain of ~2400/2000. Therefore, it is very

important to avoid adding extra impedance (ESR and ESL) to the feedback loop and to minimize the noise coupling

onto the OUTS pin, as a combination of excessive parasitics and noise injection can cause instability in the system.

To that end, minimize the effects of PCB trace and solder inductance by tying the OUTS pin directly to COUT and the

GND side of CSET directly to the GND side of COUT. If this is not possible, for example, due to a design requiring remote

sensing, a small local OUTS capacitor of 150pF or less may be added for noise decoupling at the OUTS pin. For more

information on the recommended layout that meets these requirements, refer to the LT83401/LT83402 demo board

manual.

L

RSET

CSET

OUTS

SW

LT83401/

LT83402

VOUT

SET

GND

R1

R2

CPL

COUT