C8051F310 datasheet(129/228 Pages) SILABS

129 / 228 page

Rev. 1.7

129

C8051F310/1/2/3/4/5/6/7

13. Port Input/Output

Digital and analog resources are available through 29 I/O pins (C8051F310/2/4), or 25 I/O pins

(C8051F311/3/5), or 21 I/O pins (C8051F316/7). Port pins are organized as three byte-wide Ports and one

5-bit-wide (C8051F310/2/4) or 1-bit-wide (C8051F311/3/5) Port. In the C8051F316/7, the port pins are

organized as one byte-wide Port, two 6-bit-wide Ports and one 1-bit-wide Port. Each of the Port pins can

be defined as general-purpose I/O (GPIO) or analog input; Port pins P0.0-P2.3 can be assigned to one of

the internal digital resources as shown in Figure 13.3. The designer has complete control over which func-

tions are assigned, limited only by the number of physical I/O pins. This resource assignment flexibility is

achieved through the use of a Priority Crossbar Decoder. The state of a Port I/O pin can always be read in

the corresponding Port latch, regardless of the Crossbar settings.

The Crossbar assigns the selected internal digital resources to the I/O pins based on the Priority Decoder

(Figure 13.3 and Figure 13.4). The registers XBR0 and XBR1, defined in SFR Definition 13.1 and SFR

Definition 13.2, are used to select internal digital functions.

All Port I/Os are 5 V tolerant (refer to Figure 13.2 for the Port cell circuit). The Port I/O cells are configured

as either push-pull or open-drain in the Port Output Mode registers (PnMDOUT, where n = 0,1,2,3). Com-

plete Electrical Specifications for Port I/O are given in Table 13.1 on page 143.

Figure 13.1. Port I/O Functional Block Diagram

XBR0, XBR1,

PnSKIP Registers

Digital

Crossbar

Priority

Decoder

P0.0

P0.7

PnMDOUT,

PnMDIN Registers

UART

Highest

Priority

Lowest

Priority

SYSCLK

SMBus

T0, T1

PCA

CP1

Outputs

SPI

CP0

Outputs

P1.0

P1.7

P2.0

P2.7

P3.0

P3.4

(P0.0-P0.7)

(P1.0-P1.7)

(P2.0-P2.3)

(P2.4-P2.7)

Notes:

1. P3.1-P3.4 only available on the

C8051F310/2/4

2. P1.6,P1.7,P2.6,P2.7 only available

on the C8051F310/1/2/3/4/5

(P3.0-P3.4)

I/O

Cells

I/O

Cells

I/O

Cells

I/O

Cells

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