C8051F310 datasheet(131/228 Pages) SILABS

131 / 228 page

Rev. 1.7

131

C8051F310/1/2/3/4/5/6/7

13.1. Priority Crossbar Decoder

The Priority Crossbar Decoder (Figure 13.3) assigns a priority to each I/O function, starting at the top with

UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that

resource (excluding UART0, which is always at pins 4 and 5). If a Port pin is assigned, the Crossbar skips

that pin when assigning the next selected resource. Additionally, the Crossbar will skip Port pins whose

associated bits in the PnSKIP registers are set. The PnSKIP registers allow software to skip Port pins that

are to be used for analog input, dedicated functions, or GPIO.

Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the

Crossbar, its corresponding PnSKIP bit should be set. This applies to P0.0 if VREF is used, P0.3 and/or

P0.2 if the external oscillator circuit is enabled, P0.6 if the ADC is configured to use the external conversion

start signal (CNVSTR), and any selected ADC or Comparator inputs. The Crossbar skips selected pins as

if they were already assigned, and moves to the next unassigned pin. Figure 13.3 shows the Crossbar

Decoder priority with no Port pins skipped (P0SKIP, P1SKIP, P2SKIP = 0x00); Figure 13.4 shows the

Crossbar Decoder priority with the XTAL1 (P0.2) and XTAL2 (P0.3) pins skipped (P0SKIP = 0x0C to skip

P0.2 and P0.3 for XTAL use).

Figure 13.3. Crossbar Priority Decoder with No Pins Skipped

01234

5670123456701

234567

SCK

MISO

MOSI

NSS*

CP0

CP0A

CP1

00000

0000000000000

Special Function Signals are not assigned by the Crossbar. When these signals are enabled, the Crossbar must

be manually configured to skip their corresponding port pins.

Port pin potentially available to peripheral

SF Signals

ECI

P0SKIP[0:7]

P2SKIP[0:3]

SF Signals

PIN I/O

TX0

RX0

SDA

SCL

CEX3

CEX4

P1SKIP[0:7]

CP1A

CEX2

CEX0

CEX1

SYSCLK

*Note:

NSS is only pinned out in 4-wire SPI mode.

Note:

P1.6,P1.7,P2.6,P2.7 only available on the C8051F310/1/2/3/4/5; P1SKIP[7:6] should always be

set to 11b for the C8051F316/7 devices.

C8051F310 Datasheet(PDF) 131 Page - Silicon Laboratories

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