21152 datasheet(13/148 Pages) INTEL

13 / 148 page

21152 PCI-to-PCI Bridge Preliminary Datasheet

1-5

Introduction

Table 1-1 describes the major functional blocks of the 21152.

Table 1-1.

21152 Function Blocks

Function Block

Description

Primary and Secondary Control

PCI interface control logic. This block contains state machines and

control logic for the primary target interface, the primary master

interface, the secondary target interface, and the secondary master

interface. This block also contains logic that interfaces to the data

path and the configuration block.

Primary-to-Secondary Data Path

Data path for data received on the primary interface and driven on the

secondary interface. This block is used for write transactions initiated

on the primary PCI bus and for returning read data for read

transactions initiated on the secondary PCI bus. This block contains

logic to store and, for posted write transactions, to increment the

address of the current transaction. This block also performs bus

command and configuration address format translations.

Secondary-to-Primary Data Path

Data path for data received on the secondary interface and driven on

the primary interface. This block is used for write transactions initiated

on the secondary PCI bus and for returning read data for read

transactions initiated on the primary PCI bus. This block contains logic

to store and, for posted write transactions, to increment the address of

the current transaction. This block also performs bus command and

configuration address format translations.

Configuration Registers

Configuration space registers and corresponding control logic. These

registers are accessible from the primary interface only.

Secondary Bus Arbiter Control

Logic for secondary bus arbitration. This block receives

s_req_l<3:0>, as well as the 21152 secondary bus request, and

drives one of the s_gnt_l<3:0> lines or the 21152 secondary bus

grant.

21152 Datasheet(PDF) 13 Page - Intel Corporation