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IMX27L Datasheet(PDF) 56 Page - Freescale Semiconductor, Inc |
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IMX27L Datasheet(HTML) 56 Page - Freescale Semiconductor, Inc |
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56 / 122 page ![]() i.MX27/iMX27L Data Sheet, Advance Information, Rev. 1 56 Preliminary—Subject to Change Without Notice Freescale Semiconductor Signal Descriptions 3.6.1 Direct Memory Access Controller (DMAC) After assertion of external DMA request, the direct memory access controller (DMA) burst starts when the corresponding DMA channel becomes the current highest priority channel. The external DMA request should be kept asserted until it is serviced by the DMAC. One external request initiates at least one DMA burst. t1’ CSPI slave SCLK cycle time tclki 60.2 — ns t2’ CSPI slave SCLK high time tclkiH 30.1 — ns t3’ CSPI slave SCLK low time tclkiL 30.1 — ns t4 CSPI SCLK transition time tpr1 2.6 8.5 ns t5 SSn output pulse width tWsso 2Tsclk2 +T wait3 —— t5’ SSn input pulse width tWssi Tper4 —— t6 SSn output asserted to first SCLK edge (SS output setup time) tSsso 3Tsclk —— t6’ SSn input asserted to first SCLK edge (SS input setup time) tSssi Tper —— t7 CSPI master: Last SCLK edge to SSn deasserted (SS output hold time) tHsso 2Tsclk —— t7’ CSPI slave: Last SCLK edge to SSn deasserted (SS input hold time) tHssi 30 — ns t8 CSPI master: CSPI1_RDY low to SSn asserted (CSPI1_RDY setup time) tSrdy 2Tper 5Tper — t9 CSPI master: SSn deasserted to CSPI1_RDY low tHrdy 0— ns t10 Output data setup time tSdatao (tclkoL or tclkoH or tclkiL or tclkiH) - Tipg5 —— t11 Output data hold time tHdatao tclkoL or tclkoH or tclkiL or tclkiH —— t12 Input data setup time tSdatai Tipg + 0.5 — ns t13 Input data hold time tHdatai 0— ns t14 Pause between data word tpause 0— ns 1 The output SCLK transition time is tested with 25pF drive. 2 Tsclk = CSPI clock period 3 Twait = Wait time as per the Sample Period Control Register value. 4 Tper = CSPI reference baud rate clock period (PERCLK2) 5 Tipg = CSPI main clock IPG_CLOCK period Table 22. CSPI Interface Timing Parameters (continued) ID Num Parameter Description Symbol Minimum Maximum Units |
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