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IMX27L Datasheet(PDF) 69 Page - Freescale Semiconductor, Inc |
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IMX27L Datasheet(HTML) 69 Page - Freescale Semiconductor, Inc |
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69 / 122 page  Signal Descriptions i.MX27/i.MX27L Data Sheet, Advance Information, Rev. 1 Freescale Semiconductor Preliminary—Subject to Change Without Notice 69 3.6.7 NAND Flash Controller Interface (NFC) Figure 31, Figure 32, Figure 33, and Figure 34 show the relative timing requirements among different signals of the NFC at module level, and Table 34 lists the timing parameters. The NAND flash controller (NFC) timing parameters are based on the internal NFC clock generated by the clock controller module, where time T is the period of the NFC clock in ns. The relationship between the NFC clock and the external timing parameters of the NFC is provided in Table 34. Table 32. Serial Interface Timing Parameters Signal Parameter Symbol Standards Unit Min Max MSHC_SCLK Cycle tSCLKc 50 — ns H pulse length tSCLKwh 15 — ns L pulse length tSCLKwl 15 — ns Rise time tSCLKr — 10 ns Fall time tSCLKf — 10 ns MSHC_BS Setup time tBSsu 5 — ns Hold time tBSh 5 — ns MSHC_DATA Setup time tDsu 5 — ns Hold time tDh 5 — ns Output delay time tDd — 15 ns Table 33. Parallel Interface Timing Parameters Signal Parameter Symbol Standards Unit Min Max MSHC_SCLK Cycle tSCLKc 25 — ns H pulse length tSCLKwh 5 — ns L pulse length tSCLKwl 5 — ns Rise time tSCLKr — 10 ns Fall time tSCLKf — 10 ns MSHC_BS Setup time tBSsu 8 — ns Hold time tBSh 1 — ns MSHC_DATA Setup time tDsu 8 — ns Hold time tDh 1 — ns Output delay time tDd — 15 ns |
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