4518 datasheet(53/160 Pages) RENESAS

53 / 160 page

Rev.3.01

2005.06.15

page 53 of 157

REJ03B0008-0301

4518 Group

SERIAL INTERFACE

The 4518 Group has a built-in clock synchronous serial I/O which

can serially transmit or receive 8-bit data.

Serial I/O consists of;

• serial I/O register SI

• serial I/O control register J1

• serial I/O transmit/receive completion flag (SIOF)

• serial I/O counter

Registers A and B are used to perform data transfer with internal

CPU, and the serial I/O pins are used for external data transfer.

The pin functions of the serial I/O pins can be set with the register

J1.

Table 14 Serial I/O pins

P20/SCK

P21/SOUT

P22/SIN

Pin function when selecting serial I/O

Clock I/O (SCK)

Serial data output (SOUT)

Serial data input (SIN)

Fig. 42 Serial I/O structure

Table 15 Serial I/O control register

Note: “R” represents read enabled, and “W” represents write enabled.

Note: Even when the SCK, SOUT, SIN pin functions are used, the input of

P20, P21, P22 are valid.

1/8

1/4

1/2

Synchronous

circuit

Serial I/O counter (3)

SIOF

Serial I/O

interrupt

INSTCK

P20/SCK

SCK

MSB Serial I/O register (8) LSB

SIN

J11 J10

J13J12

TSIAB

TABSI

SOUT

P21/SOUT

P22/SIN

SST

instruction

Internal reset signal

J13

J11

Serial I/O synchronous clock selection bits

Serial I/O port function selection bits

J12

J10

Serial I/O control register J1

at RAM back-up : state retained

at reset : 00002

J13

J12

J11

J10

Synchronous clock

Instruction clock (INSTCK) divided by 8

Instruction clock (INSTCK) divided by 4

Instruction clock (INSTCK) divided by 2

External clock (SCK input)

Port function

P20, P21,P22 selected/SCK, SOUT, SIN not selected

SCK, SOUT, P22 selected/P20, P21, SIN not selected

SCK, P21, SIN selected/P20, SOUT, P22 not selected

SCK, SOUT, SIN selected/P20, P21,P22 not selected

R/W

TAJ1/TJ1A

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