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4518 Datasheet(PDF) 63 Page - Renesas Technology Corp |
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4518 Datasheet(HTML) 63 Page - Renesas Technology Corp |
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63 / 160 page ![]() Rev.3.01 2005.06.15 page 63 of 157 REJ03B0008-0301 4518 Group (4) Return signal An external wakeup signal is used to return from the RAM back-up mode because the oscillation is stopped. Table 19 shows the return condition for each return source. (5) Related registers • Key-on wakeup control register K0 Register K0 controls the ports P0 and P1 key-on wakeup func- tion. Set the contents of this register through register A with the TK0A instruction. In addition, the TAK0 instruction can be used to transfer the contents of register K0 to register A. • Key-on wakeup control register K1 Register K1 controls the return condition and valid waveform/ level selection for port P0. Set the contents of this register through register A with the TK1A instruction. In addition, the TAK1 instruction can be used to transfer the contents of register K1 to register A. • Key-on wakeup control register K2 Register K2 controls the INT0 and INT1 key-on wakeup functions and return condition function. Set the contents of this register through register A with the TK2A instruction. In addition, the TAK2 instruction can be used to transfer the contents of register K2 to register A. Table 19 Return source and return condition Remarks The key-on wakeup function can be selected with 2 port units. Select the re- turn level (“L” level or “H” level), and return condition (return by level or edge) with the register K1 according to the external state before going into the RAM back-up state. The key-on wakeup function can be selected with 2 port units. Set the port using the key-on wakeup function to “H” level before going into the RAM back-up state. Select the return level (“L” level or “H” level) with the registers I1 and I2 ac- cording to the external state, and return condition (return by level or edge) with the register K2 before going into the RAM back-up state. Return condition Return by an external “H” level or “L” level input, or rising edge ( “ L ” → “ H ” ) or falling edge (“H” →“L”). Return by an external “L” level in- put. Return by an external “H” level or “L” level input, or rising edge ( “ L ” → “ H ” ) or falling edge (“H” →“L”). The external interrupt request flags (EXF0, EXF1) are not set. Return source Ports P00–P03 Ports P10–P13 INT0 INT1 • Pull-up control register PU0 Register PU0 controls the ON/OFF of the port P0 pull-up transis- tor. Set the contents of this register through register A with the TPU0A instruction. In addition, the TAPU0 instruction can be used to transfer the contents of register PU0 to register A. • Pull-up control register PU1 Register PU1 controls the ON/OFF of the port P1 pull-up transis- tor. Set the contents of this register through register A with the TPU1A instruction. In addition, the TAPU1 instruction can be used to transfer the contents of register PU0 to register A. • External interrupt control register I1 Register I1 controls the valid waveform of external 0 interrupt, in- put control of INT0 pin, and return input level. Set the contents of this register through register A with the TI1A instruction. In addi- tion, the TAI1 instruction can be used to transfer the contents of register I1 to register A. • External interrupt control register I2 Register I2 controls the valid waveform of external 1 interrupt, in- put control of INT1 pin, and return input level. Set the contents of this register through register A with the TI2A instruction. In addi- tion, the TAI2 instruction can be used to transfer the contents of register I2 to register A. |
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