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4518 Datasheet(PDF) 71 Page - Renesas Technology Corp |
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4518 Datasheet(HTML) 71 Page - Renesas Technology Corp |
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71 / 160 page ![]() Rev.3.01 2005.06.15 page 71 of 157 REJ03B0008-0301 4518 Group ➃ Stack registers (SKS) Stack registers (SKs) are eight identical registers, so that subrou- tines can be nested up to 8 levels. However, one of stack registers is used respectively when using an interrupt service routine and when executing a table reference instruction. Accord- ingly, be careful not to over the stack when performing these operations together. 10 11 ➄ Multifunction • The input/output of P30 and P31 can be used even when INT0 and INT1 are selected. • The input of ports P20–P22 can be used even when SIN, SOUT and SCK are selected. • The input/output of D6 can be used even when CNTR0 (input) is selected. • The input of D6 can be used even when CNTR0 (output) is selected. • The input/output of D7 can be used even when CNTR1 (input) is selected. • The input of D7 can be used even when CNTR1 (output) is selected. ➅ Prescaler Stop counting and then execute the TABPS instruction to read from prescaler data. Stop counting and then execute the TPSAB instruction to set prescaler data. ➆ Timer count source Stop timer 1, 2, 3 and 4 counting to change its count source. ➇ Reading the count value Stop timer 1, 2, 3 or 4 counting and then execute the data read instruction (TAB1, TAB2, TAB3, TAB4) to read its data. ➈ Writing to the timer Stop timer 1, 2, 3 or 4 counting and then execute the data write instruction (T1AB, T2AB, T3AB, T4AB) to write its data. Writing to reload register R1, R3, R4H When writing data to reload register R1, reload register R3 or re- load register R4H while timer 1, timer 3 or timer 4 is operating, avoid a timing when timer 1, timer 3 or timer 4 underflows. Timer 4 Avoid a timing when timer 4 underflows to stop timer 4 at the use of PWM output function. When “H” interval extension function of the PWM signal is set to be “valid”, set “1” or more to reload register R4H. LIST OF PRECAUTIONS ➀ Noise and latch-up prevention Connect a capacitor on the following condition to prevent noise and latch-up; • connect a bypass capacitor (approx. 0.1 µF) between pins VDD and VSS at the shortest distance, • equalize its wiring in width and length, and • use relatively thick wire. In the One Time PROM version, CNVSS pin is also used as VPP pin. Accordingly, when using this pin, connect this pin to VSS through a resistor about 5 k Ω (connect this resistor to CNVSS/ VPP pin as close as possible). ➁ Register initial values 1 The initial value of the following registers are undefined after sys- tem is released from reset. After system is released from reset, set initial values. • Register Z (2 bits) • Register D (3 bits) • Register E (8 bits) ➂ Register initial values 2 The initial value of the following registers are undefined at RAM back- up. After system is returned from RAM back-up, set initial values. • Register Z (2 bits) • Register X (4 bits) • Register Y (4 bits) • Register D (3 bits) • Register E (8 bits) |
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