M37160MF datasheet(112/131 Pages) RENESAS

112 / 131 page

Rev.1.01

2003.11.13

page 112 of 130

M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP

Address 00D416, 00D516

Address 00D616

Address 00D716

b7 b6 b5 b4 b3 b2 b1 b0

R W

Vertical Position Register i

Vertical position register i (VPi) (i = 1 and 2) [Addresses 00D416, 00D516]

Name

Functions

After reset

Inderterminate

Vertical display start

position control bits

(VPi0 to VPi7)

(See notes)

Vertical display start position =

TH ✕ (BCi6 ✕ 16

2 + n)

(n: setting value, TH: HSYNC cycle,

BCi6: bit 6 of block control register i)

Notes 1: Set values except “0016” to VPi when BCi6 is “0.”

2: When OS21 of OSD control register 2 = “0”, TH = 1HSYNC,

and OS21 of OSD control register 2 = “1”, TH = 2HSYNC.

b7 b6 b5 b4 b3 b2 b1 b0

R W

Window Register 1

Window register 1 (WN1) [Address 00D616]

Name

Functions

After reset

Inderterminate

Window top boundary

control bits

(WN10 to WN17)

Window top border position =

TH ✕ (BC17 ✕ 16

2 + n)

(n: setting value, TH: HSYNC cycle,

BC17: bit 7 of block control register 1)

Notes 1: Set values except “0016” to WN1 when BC17 is “0.”

2: Set values fit for the following condition: WN1 < WN2.

3: When OC21 of OSD control register 2 is “0”, TH is 1 HSYNC.

And when “1”, TH is 2 HSYNC.

b7 b6 b5 b4 b3 b2 b1 b0

R W

Window Register 2

Window register 2 (WN2) [Address 00D716]

Name

Functions

After reset

Inderterminate

Window bottom boundary

control bits

(WN20 to WN27)

Window bottom border position =

TH ✕ (BC27 ✕ 16

2 + n)

(n: setting value, TH: HSYNC cycle,

BC27: bit 7 of block control register 2)

Notes 1: Set values fit for the following condition: WN1 < WN2.

2: When OC21 of OSD control register 2 is “0”, TH is 1 HSYNC.

And when “1”, TH is 2 HSYNC.

M37160MF Datasheet(PDF) 112 Page - Renesas Technology Corp

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