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SH7149 Datasheet(PDF) 53 Page - Renesas Technology Corp |
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SH7149 Datasheet(HTML) 53 Page - Renesas Technology Corp |
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53 / 1022 page ![]() Section 1 Overview Rev. 3.00 May 17, 2007 Page 9 of 974 REJ09B0229-0300 Notes: 1. Fixed to VSS in the masked ROM version, and used as the FWE input pin in the F-ZTAT version. 2. A pin for the E10A emulator. Fixed to VCC in the masked ROM version, and used as the ASEMD0 input pin in the F-ZTAT version. 3. This pin function is available only in the F-ZTAT version. (Not available in the masked ROM version.) 4. This pin function is available only in F-ZTAT version supporting full functions of E10A. (Not available in the normal F-ZTAT version and the masked ROM version.) QFP-100 (Top view) PA13/A9/SCK1 PA14/A10/RXD1 PA15/CK/TXD1 PD0/D0/RXD0 PD1/D1/TXD0 PD2/D2/SCK0 VSS PD3/D3/RXD1 VCC PD4/D4/IRQ0/TXD1 PD5/D5/IRQ1/SCK1 PD6/D6/IRQ2/RXD2 PD7/D7/IRQ3/TXD2 PD8/D8/SCK2/AUDATA0*4 PD9/D9/AUDATA1*4 PD10/D10/AUDATA2*4 PD11/D11/AUDATA3*4 PD12/D12 PD13/D13 PD14/D14/AUDCK*4 PB2/A16/IRQ0/ POE0/TIC5VS PB1/ BREQ/TIC5W PB0/ BACK/TIC5WS AVSS PF15/AN15 PF14/AN14 PF13/AN13 PF12/AN12 PF11/AN11 PF10/AN10 PF9/AN9 PF8/AN8 AVCC PF6/AN6 PF4/AN4 AVSS PF2/AN2 PF0/AN0 AVCC PB16/ POE3 123456789 10 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 31 32 33 34 35 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 100 99 98 97 96 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 Figure 1.4 Pin Assignments of SH7149 (QFP Version) |
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