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SH7149 Datasheet(PDF) 33 Page - Renesas Technology Corp

Part # SH7149
Description  32-Bit RISC Microcomputer SuperH??RISC engine Family
PDF  1022 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7149 Datasheet(HTML) 33 Page - Renesas Technology Corp

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Rev. 3.00 May 17, 2007 Page xxxiii of xliv
Figure 10.163 Error Occurrence in Reset-Synchronized PWM Mode,
Recovery in Complementary PWM Mode .......................................................... 476
Figure 10.164 Error Occurrence in Reset-Synchronized PWM Mode,
Recovery in Reset-Synchronized PWM Mode .................................................... 477
Section 12 Port Output Enable (POE)
Figure 12.1 Block Diagram of POE............................................................................................ 488
Figure 12.2 Falling Edge Detection............................................................................................511
Figure 12.3 Low-Level Detection Operation.............................................................................. 512
Figure 12.4 Output-Level Compare Operation........................................................................... 512
Section 13 Watchdog Timer (WDT)
Figure 13.1 Block Diagram of WDT .......................................................................................... 516
Figure 13.2 Writing to WTCNT and WTCSR............................................................................ 521
Figure 13.3 Operation in Watchdog Timer Mode
(When WTCNT Count Clock is Specified to P
φ/32 by CKS2 to CKS0) ................523
Section 14 Serial Communication Interface (SCI)
Figure 14.1 Block Diagram of SCI............................................................................................. 526
Figure 14.2 Example of Data Format in Asynchronous Communication
(8-Bit Data with Parity and Two Stop Bits) ............................................................ 558
Figure 14.3 Sample Flowchart for SCI Initialization.................................................................. 561
Figure 14.4 Sample Flowchart for Transmitting Serial Data...................................................... 562
Figure 14.5 Example of Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 564
Figure 14.6 Sample Flowchart for Receiving Serial Data (1)..................................................... 565
Figure 14.6 Sample Flowchart for Receiving Serial Data (2)..................................................... 566
Figure 14.7 Example of SCI Receive Operation (8-Bit Data, Parity, One Stop Bit) .................. 568
Figure 14.8 Data Format in Clock Synchronous Communication .............................................. 568
Figure 14.9 Sample Flowchart for SCI Initialization.................................................................. 570
Figure 14.10 Sample Flowchart for Transmitting Serial Data.................................................... 571
Figure 14.11 Example of SCI Transmit Operation ..................................................................... 572
Figure 14.12 Sample Flowchart for Receiving Serial Data (1)................................................... 573
Figure 14.12 Sample Flowchart for Receiving Serial Data (2)................................................... 574
Figure 14.13 Example of SCI Receive Operation....................................................................... 575
Figure 14.14 Sample Flowchart for Transmitting/Receiving Serial Data................................... 576
Figure 14.15 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)........................................... 578
Figure 14.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 579
Figure 14.17 Example of SCI Operation in Reception
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) .............................. 580
Figure 14.18 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 581



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