SH7149 datasheet(19/1022 Pages) RENESAS

19 / 1022 page

Rev. 3.00 May 17, 2007 Page xix of xliv

15.7.1 Module Standby Mode Setting ............................................................................. 626

15.7.2 Permissible Signal Source Impedance .................................................................. 626

15.7.3 Influences on Absolute Accuracy ......................................................................... 626

15.7.4 Range of Analog Power Supply and Other Pin Settings ....................................... 627

15.7.5 Notes on Board Design ......................................................................................... 627

15.7.6 Notes on Noise Countermeasures ......................................................................... 628

Section 16 Compare Match Timer (CMT) ........................................................629

16.1

Features.............................................................................................................................. 629

16.2

Register Descriptions ......................................................................................................... 630

16.2.1 Compare Match Timer Start Register (CMSTR) .................................................. 631

16.2.2 Compare Match Timer Control/Status Register (CMCSR) .................................. 631

16.2.3 Compare Match Counter (CMCNT) ..................................................................... 633

16.2.4 Compare Match Constant Register (CMCOR) ..................................................... 633

16.3

Operation ........................................................................................................................... 634

16.3.1 Interval Count Operation ...................................................................................... 634

16.3.2 CMCNT Count Timing......................................................................................... 634

16.4

Interrupts............................................................................................................................ 635

16.4.1 CMT Interrupt Sources and DTC Activation........................................................ 635

16.4.2 Timing of Setting Compare Match Flag ............................................................... 635

16.4.3 Timing of Clearing Compare Match Flag............................................................. 635

16.5

Usage Notes ....................................................................................................................... 636

16.5.1 Module Standby Mode Setting ............................................................................. 636

16.5.2 Conflict between Write and Compare-Match Processes of CMCNT ................... 636

16.5.3 Conflict between Word-Write and Count-Up Processes of CMCNT ................... 637

16.5.4 Conflict between Byte-Write and Count-Up Processes of CMCNT..................... 638

16.5.5 Compare Match between CMCNT and CMCOR ................................................. 638

Section 17 Pin Function Controller (PFC).........................................................639

17.1

Register Descriptions ......................................................................................................... 656

17.1.1 Port A I/O Register L (PAIORL).......................................................................... 657

17.1.2 Port A Control Registers L1 to L4 (PACRL1 to PACRL4).................................. 657

17.1.3 Port B I/O Register L, H (PBIORL, PBIORH) ..................................................... 671

17.1.4 Port B Control Registers L1, L2, H1 (PBCRL1, PBCRL2, PBCRH1)................. 672

17.1.5 Port D I/O Register L (PDIORL) (SH7149 Only) ................................................ 679

17.1.6 Port D Control Registers L1 to L4 (PDCRL1 to PDCRL4) (SH7149 Only) ........ 679

17.1.7 Port E I/O Registers L, H (PEIORL, PEIORH) .................................................... 686

17.1.8 Port E Control Registers L1 to L4, H1, H2

(PECRL1 to PECRL4, PECRH1, PECRH2) ........................................................ 687

17.1.9 IRQOUT Function Control Register (IFCR) ........................................................ 704

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