SH7149 datasheet(77/1022 Pages) RENESAS

77 / 1022 page

Section 2 CPU

Rev. 3.00 May 17, 2007 Page 33 of 974

REJ09B0229-0300

2.5

Instruction Set

2.5.1

Instruction Set by Type

Table 2.10 lists the instructions classified by type.

Table 2.10

Instruction Types

Type

Kinds of

Instruction

Op Code

Function

Number of

Instructions

MOV

Data transfer

Immediate data transfer

Peripheral module data transfer

Structure data transfer

MOVA

Effective address transfer

MOVT

T bit transfer

SWAP

Upper/lower swap

Data transfer

instructions

XTRCT

Extraction of middle of linked registers

ADD

Binary addition

ADDC

Binary addition with carry

ADDV

Binary addition with overflow

CMP/cond

Comparison

DIV1

Division

DIV0S

Signed division initialization

DIV0U

Unsigned division initialization

DMULS

Signed double-precision multiplication

DMULU

Unsigned double-precision multiplication

Decrement and test

EXTS

Sign extension

EXTU

Zero extension

MAC

Multiply-and-accumulate, double-

precision multiply-and-accumulate

Arithmetic

operation

instructions

MUL

Double-precision multiplication

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